It is shown by TCAD simulations how the gate-induced drain leakage which dominates the OFF-current in 22nm double-gate SOI nFETs with high-K gate stacks, can be minimized by proper variations of the junction profiles. Based on a microscopic, non-local model of band-to-band tunneling, transfer characteristics are computed after systematic changes in source/drain doping, body thickness, and HfO2 ...