α,β-Unsaturated acyl ammoniums generated from the reaction of α,β-unsaturated 2,4,6-trichlorophenol (TCP) esters bearing a pendent enone with an isothiourea organocatalyst are versatile intermediates in a range of enantioselective nucleophile-dependent domino processes to form complex products of diverse topology with excellent stereoselectivity. Use of either 1,3-dicarbonyls, acyl benzothiazol...

K e y w o r d s : graphs, algori thms, HHD-free graphs, t reewidth, min imum fill-in. MSC: 68R10. 1 I n t r o d u c t i o n A graph is HHD-free if it does not contain a house (i.e., the complement of Ps), a hole (Ck for k _> 5) or a domino (see Figure 1). Fig. 1. 'House' (left), 'hole' (middle) and 'domino' (right) * kloks@math, utwente, nl

A new domino strategy for the synthesis of highly functionalized quaternary imidazole derivatives via [3 + 2] heterocyclization, involving aryl migration and ring-opening of oxirane, has been developed. This domino reaction enables the successful assembly of three new sigma bonds including two C-N bonds in a simple operation. Features of this strategy include the mild conditions, convenient ope...

We consider placing dominoes on a checker board such that each domino covers exactly some number of squares. Given a board and a type of domino, we define the mistiling ratio as the minimum proportion of squares that are covered in a maximal packing of the board with dominoes of that type. In this note we determine and bound the mistiling ratio for some types of dominoes on the infinite checker...

This paper presents a new self-resetting CMOS design for an Add-Compare-Select (ACS) unit, which is a key building block in a Viterbi decoder. Static CMOS and two-phase domino CMOS designs have also been implemented for comparison purposes. The simulation results show that, with the SRCMOS technique, the ACS units operate at a data rate of 568 Mbps in a 0.25 micron CMOS technology, as compared ...

This paper describes a tool called Focus that is currently being used for the timing ver$cation and sizing of domino CMOS circuits in a Power PCTM microprocessor Domino CMOS circuits introduce more complex timing and sizing requirements compared to conventional static circuits. This paper shows how these requirements are addressed in Focus. Some case studies involving the application of Focus o...

In this paper we present robust and high performance static ultra low-voltage CMOS binary logic. The delay of the ultra low-voltage logic presented are less than 10% of the delay of standard CMOS inverters. The logic gates presented are designed using semi floating-gate transistors and a current boost technique. The boolean gates resemble domino CMOS. The performance and robustness of different...