In this paper by using an exactly analytic approach the clock jitter in the feedback path of the continuous time Delta Sigma modulators (CT DSM) is modeled as an additive jitter noise, providing a time invariant model for a jittery CT DSM. Then for various DAC waveforms the power spectral density (psd) of the clock jitter at the output of DAC is derived and by using an approximation the in-band...

Power consumption is the major issue in VLSI design. In this paper an efficient low power first order sigma delta modulator is designed for oversampled ADC using floating gate folded cascode operational amplifier, in 0.35 μm Technology. Floating gate MOSFET have low power Dissipation hence it is an attractive solution in design of data converters, low voltage op -amp with rail-to-rail input and...

This paper presents an overview of DelSi, a MATLAB toolbox developed for the design and simulation of delta–sigma modulators. The DelSi toolbox can synthesize a stable noise-transfer function for complex network structures. The modelling tool consists of two crc programs, sdMod.c, a single stage delta–sigma modulator and firfilt.c, a decimating FIR filter. Cascaded modulators can be constructed...