Figure 1 shows the equivalent circuit of a transimpedance amplifier and a high-impedance source. IS represents the output current of the source. CS is the sum of the source’s output capacitance and the op amp’s input capacitance. RF, with the help of the op amp, converts IS to a voltage. At low frequencies, the op amp’s inverting input is forced to be at ground potential and IS must flow throug...

Over the last few years automated model generation has become an increasingly important component of methodologies for verification of large, complex mix-signal SoCs (system-on-chips) and SiPs (system-in-packages). In this paper a novel approach termed Multiple Model Generation System using Delta operator (MMGSD) is developed for extracting either single-input single-output (SISO) or multiple-i...

A CMOS operational amplifier with input/output rail-to-rail range is presented. The circuit operates with a 1-V single supply. It uses dynamically biased input level shifters, controlled by a novel tuning scheme, to extend the input common-mode voltage range from one rail to the other. The tuning circuit takes the total biasing current of the amplifier input stage and, hence, its small-signal r...

Conventional techniques to achieve a constant-gm rail-to-rail complementary N-P differential input stage require complex additional circuitry. In addition, the frequency response and common-mode rejection ratio (CMRR) are degraded. An economical but efficient design technique to overcome these problems is proposed. The proposed technique strategically overlaps the transition regions of the tail...

48 Abstract— There has been significant development in the circuit implementation of current conveyors as a key element because of its low voltage low power characteristics and wide dynamic operating range.The current conveyor agreements numerous benefits over the conventional Op-Amp. Unambiguously the current conveyor circuit can arrange for a higher voltage gain over a larger signal bandwidth...

The paper describes a case study of new 12-bit low power switched-capacitor (SC) ADC for portable applications. The paper is focused on block design of ADC and its behavioural modelling regarding low power consumption. It is reached by Op-Amp sharing technique utilisation. The basic block topology design is outlined too. The cancellation techniques for avoiding of capacitor mismatch, clock feed...

The paper deals with a new 12-bit low power switched-capacitor (SC) ADC for portable applications, such PDA, notebook etc. The paper describes design of ADC and its behavioural modelling regarding low power consumption. The Op-Amp sharing technique and capacitor scaling approach are utilized to obtain it. The basic block topology design is outlined too. The cancellation techniques to avoid the ...

In this paper, we propose an efficient approach to design optimization of analog circuits that is based on the reinforcement learning method. In this work, Multi-Objective Learning Automata (MOLA) is used to design a two-stage CMOS operational amplifier (op-amp) in 0.25μm technology. The aim is optimizing power consumption and area so as to achieve minimum Total Optimality Index (TOI), as a new...

Syllogistic reasoning is modeled in analog hardware and some hardware models, i.e. syllogisms Baroco and Darii are presented. Chaining of syllogisms is modeled by using original min-max entities (circuits), “to see” whether the two rules, modeled in dedicated hardware, i.e., IF A THEN B and IF B THEN C imply the “hardware” rule IF A THEN C. The preliminaries include original min-max circuits ba...

A computer controlled pH meter was developed using simple op-amp circuits. Analog to digital converter (ADC) card was used to acquire the output potential from the op-amp. S9ftware based signal averaging helped in reduction of electrical noise. The instrument was calibrated against pH and ammonia selective electrodes where it followed Nemstian behaviour and was l\Sed in the development of a sim...