An adiabatic logic is a technique to design low power digital VLSI’s. This paper describes the design and VLSI implementation of a multiplier using a two phase drive adiabatic dynamic CMOS logic (2PADCL) circuit. Circuit operation and performance have been evaluated using a 4×4-bit 2PADCL multiplier fabricated in a 1.2 μm CMOS process. The experimental results show that the multiplier was opera...

Comparing the performance of a set of activities or organizations under uncertainty environment has been performed by means of Fuzzy Data Envelopment Analysis (FDEA) since the traditional DEA models require accurate and precise performance data. As regards a method for dealing with uncertainty environment, many researchers have introduced DEA models in fuzzy environment. Some of these models ar...

In this article we continue the research, carried out in \cite{zajac}, on computing $*$-product of domains $\CC^N$. Assuming that $0\in G\subset\CC^N$ is an arbitrary Runge domain and D\subset\CC^N$ a bounded, smooth linearly convex (or non-decreasing union such ones), establish geometric relation between $D*G$ another $\CC^N$ which 'extremal' (in appropriate sense) with respect to special coef...

enforces the Landau gauge ∂μA a μ = 0. b a is the Lagrange multiplier and c, c are the ghost and antighost fields. The covariant derivative in the adjoint representation is given by D μ = δ ∂μ − gf Aμ . (4) For d = 3, the coupling g becomes a dimensional quantity itself. As a consequence, the three-dimensional YangMills theory (1) is superrenormalizable. Such theories exhibit serious problems i...

We consider the following question: given A ∈ SL(2,R), which potentials q for the second order Sturm-Liouville problem have A as its Floquet multiplier? More precisely, define the monodromy map μ taking a potential q ∈ L2([0, 2π]) to μ(q) = Φ̃(2π), the lift to the universal cover G = ̃ SL(2,R) of SL(2,R) of the fundamental matrix map Φ : [0, 2π] → SL(2,R), Φ(0) = I, Φ(t) = (

A linear parabolic differential equation on a moving surface is discretized in space by evolving surface finite elements and in time by backward difference formulas (BDF). Using results from Dahlquist’s G-stability theory and Nevanlinna & Odeh’s multiplier technique together with properties of the spatial semi-discretization, stability of the full discretization is proven for the BDF methods up...

A study and comparison between current mode CMOS analog multiplier, CMOS current mode multiplier/divider and high frequency four quadrant current multiplier has been carried out in this paper. Current multiplier has been simulated in SPICE with 0.35μm, 0.5μm. Simulation have been done with supply voltage of 3.3V, 1.5V and 1.55V respectively. The simulated results show that characteristic of mul...

Abstract We establish several new characterizations of amenable $W^*$ - and $C^*$ -dynamical systems over arbitrary locally compact groups. In the -setting we show that amenability is equivalent to (1) a Reiter property (2) existence certain net completely positive Herz–Schur multipliers $(M,G,\alpha )$ converging point weak* identity $G\bar {\ltimes }M$ . -setting, prove $(A,G,\alpha an analog...

Reversible logic has attracted tremendous interest among the researchers in low power VLSI field due to their simple structure and improved energy efficiency. In this paper, the implementation of an 8-bit low power multiplier based on reversible gate technology is reported. The structure of the reversible gate multiplier consists of following components: the first part is the reversible partial...

We show that the assumption n1 > λ in the Second Multiplier Theorem can be replaced by a divisibility condition weaker than the condition in McFarland’s multiplier theorem, thus obtaining significant progress towards the multiplier conjecture.