نتایج جستجو برای: یکسوساز cmos

تعداد نتایج: 19504  

2015
M. Dashtbayazi S. Marjani

A 4MHz-10GHz, 10ps/dec dynamic comparator with using negative resistance and CMOS input differential pair is proposed and designed in IBM 130nm CMOS process technology. In this design, we effort that taking maximum sampling frequency from CMOS technology and the proposed comparator consumes 110nw-146μW at 1.5V supply.

1998
J. S. Byun H. B. Jeon K. H. Lee Hun-Hsien Chang Ming-Dou Ker

A dynamic gate floating design is proposed to improve ESD robustness of the CMOS output buffers with small drive capability. By using this novel design, the human-body-model (machine-model) ESD failure threshold of a 2-mA CMOS output buffer has been practically improved from 1 KV (100 V) to greater than 8 KV (1500 V) in a 0.35m CMOS process.

Journal: :Optics Express 2013

Journal: :IEEE Transactions on Nuclear Science 1996

Journal: :international journal of nanoscience and nanotechnology(ijnn 0
a. rezaei electrical engineering department, kermanshah university of technology, kermanshah, iran

complementary metal-oxide semiconductor (cmos) technology has been the industry standard to implement very large scale integrated (vlsi) devices for the last two decades. due to the consequences of miniaturization of such devices (i.e. increasing switching speeds, increasing complexity and decreasing power consumption), it is essential to replace them with a new technology. quantum-dot cellular...

Journal: :Journal of The Society for Information Display 2022

Abstract For the first time in world, we have fabricated an organic light‐emitting diode (OLED) display that monolithically integrates Si CMOS and oxide semiconductor FETs (OSFETs). OSFETs can be stacked on CMOS. With this OS/Si monolithic stack technology, driver circuits with pixel OSFETs. This enables displays to thin bezels. In addition, fabricating OSFETs, which higher breakdown voltage th...

2004
J. A. Brzozowski M. Yoeli

We develop mathematical switch-level models for static combinational CMOS networks. In contrast to other dVdihbk MOS models and theories, our models capture design principles that are special to CMOS, such as the use of transmission gates. First we study networks consisting of cascade connections of CMOS cells realizing negative functions. We then extend this model to incorporate transmission g...

2012
Siavash Heydarzadeh Massoud Dousti

A active inductor in CMOS techonology with a supply voltage of 1.8V is presented. The value of the inductance L can be in the range from 0.12nH to 0.25nH in high frequency(HF). The proposed active inductor is designed in TSMC 0.18-um CMOS technology. The power dissipation of this inductor can retain constant at all operating frequency bands and consume around 20mW from 1.8V power supply. Induct...

2001
Kevin Ng

– This paper reviewed the technologies that enable Charge-Coupled Device based and CMOS photodiode based image sensors. The advantages and disadvantages of the two types of sensors were presented. It was concluded that in the near future, both types of sensors would continue to play a role in the imaging industry. High image quality applications would continue to demand ChargeCoupled Devices ba...

2015
J. Sandrini M. Thammasack T. Demirci P.-E. Gaillardon D. Sacchetto G. De Micheli Y. Leblebici

This work reports on a heterogeneous integration of resistive memories into the Back-End-of-the-Line of 180 nm standard CMOS foundry chips. A TaOx-based ReRAM technology with materials and processes fully CMOS compatible has been developed and characterized. A low-cost integration method is applied to the developed TaOx-based memories to achieve chip level ReRAM–CMOS integration. The integrated...

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