Modeling gene regulatory networks requires recognition of active transcriptional sites in the genome. For this reason, we present a novel approach for inferring active transcriptional regulatory modules in a genome using an established systems model of bit encoded DNA sequences. Our analysis showed variations in several properties between random and functional sequences. Cross correlation withi...

Low power dissipation, high packaging density and operation at Tera-hertz frequencies are highly desired features in the design and fabrication of logic circuits. Promising realization of these highly desired features have made Quantum dot Cellular Automata (QCA) a prospective replacement to the conventional CMOS technology for the fabrication of logic circuits in nano scale range. The traditio...

A new 3-Input XOR gate based upon the pass transistor design methodology for lowvoltage, low-voltage high-speed applications is proposed. Five existed circuits are compared with the new proposed gate. It is shown that the proposed new circuit has at least 50% improvement in power-delay product than the CPL structure and than the CMOS structure. Moreover, the proposed new circuit could also be o...

This paper proposes a parallel fixed point radial basis function (RBF) artificial neural network (ANN), implemented in a field programmable gate array (FPGA) trained online with a least mean square (LMS) algorithm. The processing time and occupied area were analyzed for various fixed point formats. The problems of precision of the ANN response for nonlinear classification using the XOR gate and...

This paper presents an area-time-efficient systolic structure for multiplication over GF(2 m ) based on irreducible all-one polynomial (AOP). A novel cut-set retiming to reduce the duration of the critical-path to one XOR gate delay is used. Also the systolic structure can be decomposed into two or more parallel systolic branches, where the pair of parallel systolic branches has the same input ...

This paper presents two new general threshold gate (GTG) structures which are based on the monostable-bistable element (MOBILE) as their main part. These new GTGs eliminate an RTD from the structure compared to old structures and lead to less elements count and better performance in terms of power consumption, maximum frequency, and power-delay product (PDP). In the paper also two new single ga...

Rapid single flux quantum (RSFQ) logic needs synchronous pulses for each gate, so the clock-wiring problem is more serious when designing larger scale circuits with this logic. So we have proposed a new SFQ logic which follows Boolean algebra perfectly by using set and reset pulses. With this logic, the level information of current input is transmitted with these pulses generated by level-to-pu...

The Digital controlled oscillator (DCO) is the core element of all digital phase locked loop (ADPLL) system. Here, we propose DCO structures with digital control, reduced hardware and low power consumption. Different DCOs are based on ring based topology having 3, 4 & 5 control bits. Number of control bits can be increased as per the requirement of output frequency range. DCOs using XOR as an i...