Article history: Received Accepted Available online 20 Nov. 2014 19 Dec. 2014 25 Dec. 2014 Based on the simplification of the addition operations in a low-power bypassing-based multiplier, a low-cost low-power bypassing-based multiplier is proposed. Row-bypassing multiplier, column-bypassing multiplier, 2-Dimensional bypassing multiplier and braun multipliers are implemented in CMOS and GDI tec...

In this paper we shall study the multipliers on Banach algebras and We prove some results concerning Arens regularity and amenability of the Banach algebra M(A) of all multipliers on a given Banach algebra A. We also show that, under special hypotheses, each Jordan multiplier on a Banach algebra without order is a multiplier. Finally, we present some applications of m...

This paper proposes a novel recursive structure block-based Wallace tree multiplier with the capability to tune its accuracy based on the precision and power requirements. The multiplier performs multiplication operations recursively from small blocks to large blocks, with a fine grain capability of turning off small blocks to trade off with power. By tuning the fidelity design “knob”, we show ...

The newly proposed reconfigurable multiplier blocks offer significant savings in area over the traditional multiplier blocks for time-multiplexed digital filters or any other system where only a subset of the coefficients that can be produced by the multiplier block is needed in a given time. The basic structure comprises a multiplexer connected to at least one input of an adderhbtractor that c...

Multiplication is one of the basic functions used in digital signal processing (DSP). It requires more hardware resources and processing time than addition and subtraction. In fact, 8.72% of all instructions in a typical processing unit is multiplier. The multiplier is a fairly large block of a computing system. The amount of circuitry involved is directly proportional to square of its resoluti...

ABSTRACT This paper introduces a digit-serial GF(2m) multiplier for use in the polynomial basis. The multiplier works with the most significant digit first and is scalable to an arbitrary digit size and can be constructed for any GF(2m). It is derived from a commonly used MSB first bit-serial multiplier, known as the standard shift-register multiplier. As the latency of the multiplier decreases...

The Multiplier Hopf Group Coalgebra was introduced by Hegazi in 2002 [7] as a generalization of Hope group caolgebra, introduced by Turaev in 2000 [5], in the non-unital case. We prove that the concepts introduced by A.Van Daele in constructing multiplier Hopf algebra [3] can be adapted to serve again in our construction. A multiplier Hopf group coalgebra is a family of algebras A = {A α } α∈π ...

In this paper, we present flexible multiprecision multiplier that combined variable precision, parallel processing (PP), razor based dynamic voltage scaling (DVS), and dedicated MP operand scheduling to provide optimum performance for variety of operating conditions. All of the building blocks of proposed flexible multiplier can either work as independent small precision multiplier or parallel ...

This study introduces a reversible optical fulladder. Also optical NOT and NOR gates are implemented through Electro-Absorption-Modulator / Photo Detector (EAM/PD) pairs, were utilized for fulfilling reversible R gate. Then, reversible fulladder was designed based on the proposed reversible optical R gate. The operation of the suggested fulladder was simulated using Optispice and it was fou...