A low-cost, manufacturable defect gettering and passivation treatment, involving simultaneous anneal of a PECVD SiNx film and a screen-printed Al layer, is found to improve the lifetime in Si ribbon materials from 1-10 μs to over 20 μs. Our results indicate that the optimum anneal temperature for SiNx-induced hydrogenation is 700°C for EFG and increases to 825°C when Al is present on the back o...

In this study, the impacts of gate recess and passivation on AlGaN/GaN high electron mobility transistors (HEMTs) were investigated. The trap-related characteristics were studied in detail by several different measurements including dc current– voltage, current collapse, gate lag, and flicker noise characterizations. With a Cl2/Ar-recessed gate, drain current collapse factors ( Imax) of 37:5 an...

6 ABSTRACT: In the past, the electrochemical instability of III−V semi7 conductors has severely limited their applicability in photocatlaysis. As a result, 8 a vast majority of the research on photocatalysis has been done on TiO2, which is 9 chemically robust over a wide range of pH. However, TiO2 has a wide band gap 10 (3.2 eV) and can only absorb ∼4% of the solar spectrum, and thus, it will n...

ABSRACT Germanium offers higher electron and hole mobility than silicon, making it an attractive option for future high-performance MOSFET applications. To date, Ge p-channel device behavior has shown promise, with many reports of measured hole mobilities exceeding that of Si. However, Ge n-channel devices have shown poor performance due to an asymmetric distribution of interface state density ...

Thermo-mechanical failures may occur in the passivation layer of micro-electronic devices during the fabrication process. These are in form of cracks which initiate at keyhole corners. In order to predict and eventually prevent these cracks a failure criterion is presented, based on an average value of the elastic strain energy in the vicinity of a reentrant corner of any angle. The proposed st...

Phosphorous passivation of the interface (4H-SiC/SiO2) improves interface trap density (Dit) from 10 13 eV -1 cm -2 to 2×10 12 eV -1 cm -2 at 0.2eV below the conduction band edge of 4H-SiC. Due to the formation of phosphosilicate glass (PSG) layer during P passivation, metal-oxide-semiconductor capacitors (MOS-Cs) are highly unstable. Under bias-temperature stress (BTS) there is very large shif...

The study comprises evaluation of suitability of passive layer created on the surface of AISI 316L stainless steel for products that are intended to have contact with blood. For that purpose, prior to and after chemical passivation, samples were subject to 7 day exposure in artificial plasma at the temperature of T=37°C. Next, tests of metallic ions infiltration from the surface to the solution...

We investigate the passivation quality of Al2O3 thin films grown by atomic laver deposition on differently etched surfaces of ~500 μm thick, 2.13 Ωcm p-type float zone silicon wafers with an (100) crystal orientation. The applied CPand KOH-etches lead to differently shaped surface morphologies but almost equal root-mean-squared (rms) roughnesses of ~0.95 nm (CP) and ~1.07 nm (KOH) measured with...

Recent studies have shown that the Cu/cap layer interface is the dominant diffusion path for electromigration (EM) in Cu interconnects, making it important to develop effective methods to evaluate the effect of passivation layer on interfacial mass transport and EM lifetime for Cu interconnects. This work shows that a set of isothermal stress relaxation tests together with appropriate modeling ...