Energy-aware task scheduling is critical for real-time embedded systems. Although dynamic power has traditionally been a primary source of processor power consumption, leakage power is becoming increasingly important. In this paper, we present two optimal energy-aware polynomial-time algorithms for scheduling a set of tasks with release times, deadlines and precedence constraints on a single pr...

System-on-a-chip solutions often require simple processors designed to perform a narrow variety of tasks meeting certain performance specifications. It is important to use processors that perform the required tasks with minimal waste of chip area and power consumption, however there are engineering expenses to design an optimal processor for each SOC solution. Starting from a 3-stage pipelined ...

Energy efficiency is considered as a critical requirement for wireless sensor networks. As more wireless sensor nodes are equipped with multi-cores, there are emerging needs for energy-efficient real-time scheduling algorithms. The T-L plane-based scheme is known to be an optimal global scheduling technique for periodic real-time tasks on multi-cores. Unfortunately, there has been a scarcity of...

The ever-growing level of parallelism within the multi-core and multi-processor nodes in clusters leads to the generalization of distributed memory banks and busses with nonuniform access costs. These NUMA effects have been mostly studied in the context of threads scheduling and are known to have an influence on high-performance networking in clusters. We present an evaluation of their impact o...

The article describes parallel implementations of two parametric identification algorithms. The first algorithm is based on the estimation of Bravais unit cell parameters, and the second one estimates Wigner-Seitz cell volumes. The developed parallel implementations are based on the two-tier model of concurrency. An external tier of concurrency uses Message Passing Interface (MPI) technique to ...

The network-on-chip (NoC) provides a viable solution to bus-contention problems, that occur in classical manycore architectures. However, NoC complex design requires particular attention support the execution of real-time workloads. In this paper, we consider task-to-core allocation and inter-task communications, guarantee respect timing constraints. addition, address task-to-main-memory as it ...