The working principle of large optical transceiver is introduced in this article, and the time division MUX and the time division DEMUX are designed by the online system programmable technology and the FPGA (Field Programmable Logic Array), including hardware design, software design, and testing. The transmitting design and the receiving design method of time division MUX are introduced in deta...

For high speed applications, a huge number of adders or compressors are to be used in multiplications to perform the partial product addition. In this paper a new approach of reducing power for a given system is developed that is adiabatic logic. The Array multiplier, Vedic 4x4 multiplier and 8x8 multiplier are designed using energy recovery logic in the inverter. The number of adders is reduce...

| An array cell (AC) architecture for the layout design is described, which is dedicated to lowpower design by means of the NMOS 4-phase dynamic logic. An AC is constructed of (M N)+2 transistors so as to constitute each type of NMOS 4-phase logic gates. A graph theoretic approach is exploited in the layout design to reduce the layout area. A number of experimental results demonstrate the pract...

1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic gate in extrinsic EHW allows us to describe behaviour of any multi-input multi-output logic function. The circuit is represented in the form of connections and functionalities of a rectangular array of building block...

Field-Programmable Gate Arrays (FPGAs) and Single-Instruction Multiple-Data (SIMD) processing arrays share many architectural features. In both architectures, an array of simple, ne-grained logic elements is employed to provide high-speed, customizable, bit-wise computation. In this paper, we present a uniied computational array model which encompasses both FPGAs and SIMD arrays. Within this fr...

Genetic algorithms are the search and optimization methods based on the principles of natural evolution. An optoelectronic implementation is proposed in this paper to realize a genetic algorithm. Based on binary logic operations, crossover and mutation of a population of chromosomes can be carried out in parallel, which is very suitable for optical implementation. An electron trapping device is...

Logistic systems analysts use a wide array of modeling systems such as algebraic and logic programs. Two simple examples show how they mesh as Constraint Logic programs, emphasizing the visual style of formulation. A facility location problem is solved in Prolog. Its standard mathematical programming formulation is then represented in CLP(R) to reach an optimal solution faster. The examples are...

2. CAPACITIVE SOLUTIONS This paper reviews differential implementations of threshold logic gates, detailing two classes of solutions: capacitive (switched capacitor and floating gate), and conductance/current. The concept underlying capacitive TLGs is the use of an array of capacitors to implement the weighted sum of inputs. The idea was introduced as early as 1966 [6]. Capacitive TLGs can be c...

Hybrid control systems integrate discrete logic combined with physical system dynamics. Discrete logic can be represented in a graphical, data flow language using a UML compliant statechart model. The physical system dynamics can also be integrated in the hybrid system by using the same data flow language. The resulting system can execute on a real-time processor or a system which includes both...