نتایج جستجو برای: hierarchical architecture

تعداد نتایج: 320407  

2003
Christopher LaRosa

Despite recent increases in the processing power of handheld computers, often called palmtops, the devices continue to function primarily as personal information organizers. We believe adding mass storage to handheld computers will expand the usefulness of the devices. We propose a storage hierarchy, involving a hard disk and large software controlled flash memory cache, that lowers the power c...

2000
Marius Pirvu Laxmi N. Bhuyan Rabi N. Mahapatra

When proposing new architectural enhancements, it is also important to account for the hardware complexity. To achieve this goal, we propose to model the new design in a hardware description language (HDL), synthesize the HDL code, and infer a realistic clock cycle which will be used in subsequent simulations. For accurate results, we develop a two-level hierarchical simulation technique, where...

2002
Anthony Cramp John P. Best Michael J. Oudshoorn

In the High Level Architecture (HLA), systems of systems simulation can be achieved in a distributed manner with federates simulating the subsystems. The system as a whole is then simulated via the collaboration of these federates in a federation. A problem arises when multiple systems are simulated within one federation. A subcomponent (federate) receiving data needs to know if that data was g...

Journal: :Wireless Personal Communications 2014
Heikki Karvonen Jukka Suhonen Juha Petäjäjärvi Matti Hämäläinen Marko Hännikäinen Ari Pouttu

A hierarchical architecture for wireless sensor network (WSN) consisting of heterogeneous devices is introduced in this paper. Proposed architecture is well suited for surveillance of critical infrastructures and it is designed to be scalable for various different scenarios. Low power consumption will be achieved by utilizing a wake-up radio concept which enables to keep the most power consumin...

2002
Michael Dittenbach Dieter Merkl Andreas Rauber

The Self-Organizing Map is a very popular unsupervised neural network model for the analysis of high-dimensional input data as in data mining applications. However, at least two limitations have to be noted, which are caused, on the one hand, by the static architecture of this model, as well as, on the other hand, by the limited capabilities for the representation of hierarchical relations of t...

Journal: :IEEE transactions on neural networks 2002
Andreas Rauber Dieter Merkl Michael Dittenbach

The self-organizing map (SOM) is a very popular unsupervised neural-network model for the analysis of high-dimensional input data as in data mining applications. However, at least two limitations have to be noted, which are related to the static architecture of this model as well as to the limited capabilities for the representation of hierarchical relations of the data. With our novel growing ...

2002
Michael Dittenbach Dieter Merkl Andreas Rauber

The Self-Organizing Map is a very popular unsupervised neural network model for the analysis of high-dimensional input data as in data mining applications. However, at least two limitations have to be noted, which are caused, on the one hand, by the static architecture of this model, as well as, on the other hand, by the limited capabilities for the representation of hierarchical relations of t...

Journal: :I. J. Robotics Res. 2003
Akio Namiki Koichi Hashimoto Masatoshi Ishikawa

The efferent signal is the impulses from the brain to muscle or organ tissue. The afferent signal is the sensation that transmits the state of peripheral body parts to the brain. The motor control architectures of biological systems have hierarchical structures in which the efferent/afferent signals interact. Thanks to this architecture flexible and reflective action is realized. In this paper ...

Journal: :CoRR 2016
Gurshaant Singh Malik Krishna Gupta Raunak Dharani K. Madhava Krishna

Field Programmable Gate Arrays(FPGA) exceed the computing power of software based implementations by breaking the paradigm of sequential execution and accomplishing more per clock cycle by enabling hardware level parallelization at an architectural level. Introducing parallel architectures for a computationally intensive algorithm like Rapidly Exploring Random Trees(RRT) will result in an explo...

2008
Wim J. C. Melis Michitaka Kameyama

A large number of real world applications, such as image recognition and understanding, can still not be performed easily by conventional algorithms in comparison with the human brain. Implementing applications that require such intelligence, might therefore require a different approach, for which Hierarhical Temporal Memory (HTM) seems a promising framework. Currently HTM exists as a software ...

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