In this paper, transistor-level simulations of a detector called “cross-differentiate-multiplier demodulator (CDM)” are presented. This detector, which uses three blocks (a differentiator, a multiplier and a subtractor), is able to demodulate a received bit sequence, that was transmitted using a frequency-shift keying modulation scheme, with a bit rate equal to 20kbps. The application of this d...

Coordinate Rotation Digital Computer is a general purpose digital computer for the real time computations. At present the need of Multipliers is increasing in various real time domains which have the core operations like trigonometric computations, Multiplication and Division. The three important parameters which affect the current trends of VLSI domains are power, speed and area. Usage of conv...

A protein concentration measurement system with two-port flexural plate-wave (FPW) biosensors using a frequency-shift readout technique is presented in this paper. The proposed frequency-shift readout method employs a peak detecting scheme to measure the amount of resonant frequency shift. The proposed system is composed of a linear frequency generator, a pair of peak detectors, two registers, ...

An efficient, stable and reliable system to detect the unknown phase of the input sinusoidal signal is presented. The proposed design is a feedback loop consists of subtractor, peak detector and direct digital synthesizer (DDS). DDS generates a sinusoidal signal with the same frequency of input signal and with initial zero phase. An error signal is the output of subtracor after subtracting DDS ...

Photochromes are photoswitchable, bistable chromophores which, like transistors, can implement binary logic operations. When several photochromes are combined in one molecule, interactions between them such as energy and electron transfer allow design of simple Boolean logic gates and more complex logic devices with all-photonic inputs and outputs. Selective isomerization of individual photochr...

This paper describes a framework and tools for automating the production of designs which can be partially recon gured at run time. The tools include: (i) a partial evaluator, which produces con guration les for a given design, where the number of con gurations can be minimised by a process known as compile-time sequencing; (ii) an incremental con guration calculator, which takes the output of ...

In this paper, the possibility of using a silicon waveguide based microring resonator as a nonlinear all-optical switch is described under low power operation through a two-photon absorption effect. All-optical multiplexer/demultiplexer scheme based on two cascaded microring resonators has been proposed and described. The proposed circuits require smaller number of ring resonators and a single ...

Square root operation is hard to implement on FPGAs because of the complexity of the algorithms. In this paper, we present a non-restoring square root algorithm and two very simple single precision floating point square root implementations based on the algorithm on FPGAs. One is low-cost iterative implementation that uses a traditional adder/subtractor. The operation latency is 25 clock cycles...