It is known that conventional metal-oxide-silicon ~MOS! devices will have gate tunneling related problems at very thin oxide thicknesses. Various high-dielectric-constant materials are being examined to suppress the gate currents. In this article we present theoretical results of a charge control and gate tunneling model for a ferroelectric-oxide-silicon field effect transistor and compare them...

A systematic capacitance-voltage study has been performed on GaAs metal-oxide-semiconductor MOS structures with atomic-layer-deposited HfO2/Al2O3 nanolaminates as gate dielectrics. A HfO2/Al2O3 nanolaminate gate dielectric improves the GaAs MOS characteristics such as dielectric constant, breakdown voltage, and frequency dispersion. A possible origin for the widely observed larger frequency dis...

Group IV quantum dots (QDs) in HfO2 are attractive for non-volatile memories (NVMs) due to complementary metal-oxide semiconductor (CMOS) compatibility. Besides the role of charge storage centers, SiGeSn QDs have advantage a low thermal budget formation, because Sn presence decreases crystallization temperature, while Si ensures higher stability. In this paper, we prepare MOS capacitors based o...

A low voltage self-biased high swing cascode current mirror (SHCCM) with improved bandwidth has been proposed. The recently reported SHCCM architecture use the bulk-driven quasi-floating gate (BDQFG) MOS transistors to enhance the effective transconductance which improves the current mirror input resistance and bandwidth range over the same architecture realized using bulk-driven MOS transistor...

A simple method of measuring charge in surface states as a function of the surfacepotential in MOS transistors or MOS capacitors is proposed. A constant d.c. current is fed into the gate of an MOS transistor and with the help of an operational amplifier, the gate voltage V, with respect to the bulk is plotted as a function of gate charge Q,. The gate charge as a function of the surfacepotential...

Hardware implementation of artificial neuron networks (ANN) based on MOS-transistors with floating gates (Neuron MOS or νMOS) is discussed. Comparison of two type on-chip learning neurons with digital and analog input weight storing is provided. The main problem in design the neuron with analog input weight memory is tolerance to deviations of circuit elements parameters and supplied voltage de...

A CMOS bandgap current reference circuit has been developed in a 0.13 um CMOS technology. The circuit exhibits low sensitivity to temperatureand power supply variations. The combination of the natural properties of thin gate oxide MOS transistors with a gate-all-around layout approach makes stable operation in harsh radiation environment possible. In the present design we utilize only MOS struc...

Realization of chip-based all-optical and optoelectronic computational networks will require ultracompact Si-compatible modulators, ideally comprising dimensions, materials, and functionality similar to electronic complementary metal-oxide-semiconductor (CMOS) components. Here we demonstrate such a modulator, based on field-effect modulation of plasmon waveguide modes in a MOS geometry. Near-in...

2014 The aim of this paper is to describe the modelling methods of the vertical channel MOS transistor (V. MOS) under DC and small signal HF conditions. By taking into account the scattering velocity saturation mechanisms, it will primarily be shown that (i) the drain current-gate voltage transfer characteristic becomes linear and (ii) the dynamic HF parameters are independent of the gate-sourc...