ANSI/ISA S84.01-1996 and drafts IEC 61508/61511 are standards covering the design, operation, maintenance, and testing of safety instrumented systems (SIS). The standards stress the importance of minimizing potential faults in the SIS through good design and engineering practice. These faults include random hardware, systematic, and common cause faults. Common cause faults occur when a single f...

We present the tool UFIT (Uppaal Fault Injector for Timed automata). In UFIT, we model five types of faults, namely, message loss, transient, byzantine, stuck-at, and fail-stop faults. Given the fault-free timed automata model and the selection of a type of fault, UFIT models the faults and generates the fault-affected timed automata model automatically. As a result, the designer can analyze th...

Given a set of memory array faults the problem of computing a compact March test that detects all specified memory array faults is addressed. In this paper, we propose a novel approach in which every memory array fault is modeled by a set of primitive memory faults. A primitive March test is defined for each primitive memory fault. We show that March tests that detect the specified memory array...

Most fault localization techniques take as input a faulty program, and produce as output a ranked list of suspicious code locations at which the program may be defective. When researchers propose a new fault localization technique, they typically evaluate it on programs with known faults. The technique is scored based on where in its output list the defective code appears. This enables the comp...

This paper reports a design technique to make Complex CMOS Gates fail-safe for a class of faults. Two classes of faults are denned. The failsafe design presented has limited fault-tolerance capability. Multiple faults are also covered.

The arrangement graph, which represents a family of scalable graphs, is a generalization of the star graph. There are two parameters, denoted by n and k, for the arrangement graph, where 1 1 ≤ ≤ − k n . An n k , -arrangement graph, which is denoted by An,k, has vertices corresponding to the arrangements of k numbers out of the set 1 2 , , , n . In this thesis, a fault-free Hamiltonian path is e...

The Cingoli arcuate anticline is part of the Apennines fold-thrust belt in Italy. The anticline nvolves sedimentary carbonate strata generally affected by syn-thrusting contractional tructures such as bed-normal pressure solution seams, folds, and reverse faults. An xception is constituted by an outcrop in the anticline hinge, where sub-horizontal arbonate and chert beds are affected by joints ...

We classify all path-delay faults of a combinational circuit into three categories: singly-testable (ST), multiply-testable (MT), and singly-testable dependent (ST-dependent). The classification uses any unaltered single stuck-at fault test generation tool. Only two runs of this tool on a model network derived from the original network are performed. As a by-product of this process, we generate...

To create a combinational ATPG model for an acyclic sequential circuit, all unbalanced fanouts, i.e., fanouts reconverging with different sequential depths, are moved toward primary inputs using a retiming-like transformation. All flipflops are then shorted and unbalanced primary input fanouts are split as additional primary inputs. A combinational test vector for a fault in this model is conve...

This paper presents an experimental study on the emulation of software faults by fault injection. In a first experiment, a set of real software faults has been compared with faults injected by a SWIFI tool (Xception) to evaluate the accuracy of the injected faults. Results revealed the limitations of Xception (and other SWIFI tools) in the emulation of different classes of software faults (abou...