OBJECTIVE To evaluate whether healthy young children are able to perform automated static perimetry reliably using the frequency-doubling technology (FDT) perimeter. DESIGN Prospective, observational case series. PARTICIPANTS Forty healthy children aged 4 to 14 years. TESTING Subjects underwent, in 1 randomly chosen eye, 2 consecutive visual field (VF) tests using the C-20 full-threshold ...

This work proposes a test that evaluates how well a subject can recognize and relate objects in the peripheral and foveal field while focused on some different task and how well this subject can make decisions based on this visual information. Although there exist a few peripheral vision tests in ophthalmology for checking the homogeneity and the reach of the vision field, these professional or...

A method to perform diagnostic test generation in sequential circuits by modifying a conventional test generator is presented. The method utilizes circuit netlist modification along with a forced value at a primary input in the modified circuit. Techniques to reduce the computational effort for diagnostic test pattern generation in sequential circuits are also presented. Speed-up of the diagnos...

This article describes the Boolean satis ability method for generating test patterns for single stuck at faults in combinational circuits This new method generates test patterns in two steps First it constructs a formula expressing the Boolean di erence between the unfaulted and faulted circuits Second it applies a Boolean satis ability algorithm to the resulting formula This approach di ers fr...

| Functional debugging of application speci c integrated circuits (ASICs) has been recognized as a very labor-intensive and expensive process. We propose a new approach based on the divide and conquer optimization paradigm for the functional test pattern execution. The goal is to maximize the simultaneous controllability of an arbitrary set of the user selected variables in the design at the de...

In current thesis, two test pattern generation approaches based on genetic algorithms are presented. The, first algorithm is designed so that it allows direct comparison with random method. Comparative results show that genetic algorithm performs better on large circuits, in the last stage of test generation when much of search effort must be made in order to detect still undetected faults. Exp...

We generate space-time coupled attosecond pulse trains with a 1.8 μm wavelength laser pulse using the ‘attosecond lighthouse’ technique. We show low divergence, spatially well-separated beamlets from low ionization potential gas media. We also find that there is little long trajectory contribution—only the short trajectory contribution is clearly visible for any beamlet. These results open a ne...

This work describes a cryogenic, electro-optically -switched Yb:YAG laser that generates 114-W average TEM power with 47% optical-to-optical efficiency. Pulse repetition frequency is 5 kHz, pulse duration is 16 ns full-width at half-maximum, and is less than 1.05.

This paper presents new techniques for speeding up deterministic test pattern generation for VLSI circuits. These techniques improve the PODEM algorithm by reducing number of back-tracks with a low computational cost. This is achieved by nding more necessary signal line assignments, by detecting connicts earlier, and by avoiding unnecessary work during test generation. We have incorporated thes...

Pseudorandom built-in self test (BIST) generators have been widely utilized to test integrated circuit and systems. In this Project an accumulator-based-3 weight test pattern generation scheme is presented and proposed scheme generates set of test patterns with weights 0, 0.5 and 1. These accumulators are mostly found in current VLSI chips and that the scheme can be efficiently to drive the har...