This paper presents a circuit simulator based on look-up table approach for simulation of VLSI digital circuits with emerging devices which currently cannot be simulated with existing commercial simulators. We have used a point relaxation based circuit simulator which is suitable for digital circuits. To validate our circuit simulator, we have simulated standard circuits with MOS devices of SPI...

Controlled power is a prerequisite of various sectors, including industries. The implementation of microcontroller based firing angle control, using ATmega 32 MCU and associated hardware circuitry is discussed here. Main emphasis is given on improved performance of converter so as to achieve reliable and consistent power control. The power control scheme uses commonly available components like ...

Technology trends, driven by the desire for higher transistor densities and faster devices, have led to transistor dimensions scaling into the nanometre regime. However, with this continued scaling, digital Integrated Circuits (ICs) have faced many challenges that include: increased leakage power dissipation, increased process variations of transistor parameters and increased sensitivity of ICs...

Formulation of closed form expressions for computingMISR aliasing probability exactly had remained an unsolved problem.This paper presents single and multiple MISR aliasing probability expres-sions for arbitrary test lengths. A framework, based on algebraic codes,is developed for the analysis and synthesis of MISR-based test responsecompressors for BIST. This framework is us...

Many semiconductor quantum devices utilize a novel tunneling transport mechanism that allows picosecond device switching speeds. The negative differential resistance characteristic of these devices, achieved due to resonant tunneling, is also ideally suited for the design of highly compact, self-latching logic circuits. As a result, quantum device technology is a promising emerging alternative ...

Integrated circuit manufacturers provide libraries of pre-designed digital cells for digital circuit design. The transistor level implementation of the cells is not considered during the design procedure. The cells, such as buffers, logic gates, adders, flip-flops, etc. are used without modifications wherever needed. For that reason the cells are not fine tuned to their unique surrounding condi...

The wave digital filter (WDF) theory provides us with a systematic methodology for building digital models of analog filters through the discretization of their individual circuit components. In some situations, WDF principles can also be successfully used for modeling circuits in which a nonlinear circuit element is present under mild conditions on its characteristic. In this paper, we propose...

A clock with adjustable rise and fall time is used in conjunction with a D flip-flop that operates well with this clock. Its intended use is to relax the design of the clock network in digital circuits and to alleviate the problems with simultaneous switching noise in mixed-signal circuits. A test chip has been designed in a 0.35 μm CMOS process. The chip consists of a clock driver with adjusta...

We study the fitness landscapes generated by evolving digital circuits using an idealised model of a fieldprogrammable gate array. It appears that the fitness landscapes of this engineering problem are quite different from many recently studied landscapes, often defined over simplified combinatorial and optimisation problems. The difference stems from the genotype representation which allows us...

When designing digital logic circuits, it is frequently necessary to draw the circuits by hand before implementing the design in RTL. If there are some issues faced during simulation or synthesis of the design, the design process has to be repeated. To speed up the design cycle, it would be beneficial to have an environment that can capture handdrawn digital circuit diagrams and generate the RT...