Capacitor-couple technique used to lower snapbacktrigger voltage and to ensure uniform ESD current distribution in deep-submicron CMOS on-chip ESD protection circuit is proposed. The coupling capacitor is realized by a poly layer right under the wire-bonding metal pad without increasing extra layout area to the pad. A timing-original design model has been derived to calculate the capacitor-coup...

In the present deregulated environment, optimal placement of Distributed Generation (DG) and shunt capacitor in the distribution network plays a vital role in distribution system planning. In this paper, an analytical approach for optimal placement of combined DG and Capacitor units are determined with the objective of power loss reduction and voltage profile improvement. Firstly, the DG unit i...

Leg capacitor energy balancing control is one of the crucial issues for stable operation a cascaded H-bridge (CHB) converter. Because this topology inherently consists numerous submodule cells with DC capacitors, cell voltages and leg instantaneously fluctuate depending on sequence CHB In general, wye-connected CHB-converter-based static synchronous compensator (STATCOM) utilizes zero-sequence ...

Recently the reduction of power consumption is one of the most important issues in the design of LSI circuits. Circuit designers quite commonly evaluate the power consumption on the basis of the “fact” that when we charge a capacitor C by a voltage source E or when we discharge the capacitor with the voltage E we consume the energy of 12CE . This “fact” can be verified typically for the simple ...

The existing multilevel inverter (MLI) has problems such as a large number of devices, complex structure, and voltage stress the semiconductor. These shortcomings are not conducive to modularization, high efficiency miniaturization inverter. Therefore, topology extended switched capacitor utilizing single power supply is proposed. In which, used virtual supply, through switching control strateg...

Selective harmonic elimination–pulsewidth modulation (SHE–PWM) is a technique widely used to improve the efficiency and content in medium-voltage high-power converters. Among these converters, three-level neutral-point-clamped (3L-NPC) converter one of most utilized topologies. However, 3L-NPC requires proper balancing dc-link capacitor voltages. This article presents control technique, based o...

When a high DC voltage is applied to a capacitor with strongly asymmetrical electrodes, it generates a mechanical force that affects the whole capacitor. This is caused by the motion of ions generated around the smaller of the two electrodes and their subsequent interaction with the surrounding medium. If one of the electrodes is heated, it changes the conditions around the capacitor and influe...

This work presents a CMOS integrated interface circuit (IIC) enabling highly efficient energy transfer from piezoelectric generators (PGs) to a storage element, e.g. a large capacitor. Due to the low power consumption of 4.7 μW assuming a supply voltage of 2.5 V, the IIC can be supplied totally by the storage capacitor. The storage capacitor can be passively charged via a bypassing circuit if i...

The use of fuseless capacitor banks requires subtle changes in the protection approach from the more traditional fused banks. This paper covers the aspects of protecting fuseless capacitor banks of various voltage classes. Comparison of fused versus fuseless capacitor bank protection is discussed, along with examples and insights from Minnesota Power’s experiences with fuseless capacitor banks.

In this paper an analytic approach to estimate the nonlinearity of radix-4 pipelined analog-to-digital converters due to the circuit non-idealities is presented. Output voltage of each stage is modeled as sum of the ideal output voltage and non-ideal output voltage (error voltage), in which non-ideal output voltage is created by capacitor mismatch, comparator offset, input offset, and finite ga...