Regulatory actions of calmodulin on the contractile apparatus and cytoskeleton of smooth muscle and nonmuscle tissue are mediated by a number of specific calmodulin-binding proteins that bind to F-actin in a flip-flop manner--i.e., they bind to calmodulin or F-actin depending on the presence or absence, respectively, of Ca2+. A survey for such proteins in brain, adrenal gland, and pituitary gla...

Power consumption is a major bottleneck of system performance. A large portion of the on chip power is consumed by the clock system. It is made of the any integrated circuit, clock distribution network and flop-flops. A new system will considerably reduce the number of transistor it will lead to the reduction in clocking power and also improve the overall power consumption. Various design techn...

The paper introduces novel architectures for implementation of fully static master-slave flip-flops for low power, high performance, and high density. Based on the proposed structure, traditional C(2)MOS latch (tristate inverter/clocked inverter) based flip-flop is implemented with fewer transistors. The modified C(2)MOS based flip-flop designs mC(2)MOSff1 and mC(2)MOSff2 are realized using onl...

One of the effective ways to reduce power consumption is using clustered voltage scaling technique. The level converter flip-flop is needed to control static current when the block with Low Supply Voltage (VDDL) drives the block with High Supply Voltage (VDDH). One of the big challenges of design is that level converter flip-flop has low power and high speed. In this paper, pulse triggered leve...

In recent years, there has been an increasing demand for high-speed digital circuits at low power consumption. The use of dual edge-triggered flip-flops can help reduce the clock frequency to half of the single edge-triggered flip-flops while maintaining the same data throughput, this thereafter translates to better performance in terms of both power dissipation and speed. Pulsetriggered flip-f...

Electronic Content Addressable Memories (CAM) implement Address Look-Up (AL) table functionalities of network routers; however, they typically operate in the MHz regime, turning AL into a critical network bottleneck. In this communication, we demonstrate the first steps towards developing optical CAM alternatives to enable a re-engineering of AL memories. Firstly, we report on the photonic inte...

The communication security is set up by registration during the first beliefand get in touch between two human beings. The safety codes among them aregenerated and the records are blocked by these protection codes if the end user is not therequired one. On the other hand, the unlocked records are transmitted if the required enduser is confirmed by the feedback brain signals via the comments min...

Low scaling technology makes a significant reduction in dimension and supply voltage, and lead to new challenges about power consumption such as increasing nodes sensitivity over radiation-induced soft errors in VLSI circuits. In this area, different design methods have been proposed to low power flip-flops and various research studies have been done to reach a suitable hardened flip-flops. In ...

In this paper a novel low power double edge pulse triggered flip flop (FF) design is present. First, the pulse generation control logic by using the NAND function and is removed from the critical path to facilitate a faster discharge operation. A simple two transistor NAND gate design is used to reduce the circuit complexity. Second, a double edge conditional discharging flip flop is used to re...

This paper proposes a new double-edge-triggered implicitly level-converting flip-flop, suitable for a low-power and low-voltage design. The design employs a sense amplifier architecture to reduce the delay and power consumption. Experimentally, when implemented with a 130-nm, single-Vt and 0.84 V VDD process, it achieves 64% power-delay product (PDP) improvement, and moreover, 78% PDP improveme...