نتایج جستجو برای: 65nm cmos technology

تعداد نتایج: 480154  

2010
Yue Ping

A 60 GHz Analog Phase Shifter in 65nm bulk CMOS process has been explored for microwave frequency applications. It is an analog phase shifter with three transistors in the form of an active circulator and a LC network to attain the desired phase shift. This phase shifter is designed to work at a high frequency of 60 GHz to attain phase shift range of 140 o . The proposed phase shifter works at ...

2013
Keyuan Liao Qin Li Zhigong Wang

A third-order Chebyshevlow-pass filter, using Gm-C structure, based on Nauta’s OTA, is presented. The filter is designed for 60GHz wireless communication using 65nm CMOS process and 1.2V power supply. The cutoff frequency of the filter is required to be tuned from 1GHz to 5GHz.UsingNauta’stransconductance characteristics, the filter can be operated at ultra-high frequency band and has a high li...

2009
Mahmut E. Sinangil Naveen Verma Anantha P. Chandrakasan

A 64kb SRAM array fabricated in 65nm lowpower CMOS operates from 250mV to 1.2V. This wide supply range is enabled by a combination of circuits optimized for both sub-Vt and above-Vt regimes. Reconfigurable circuits are used extensively, as low voltage assist circuits are required for functionality, but they must not limit performance during high voltage operation. The SRAM operates at 20kHz wit...

2013

A new power-rail ESD clamp circuit designed with PMOS as main ESD clamp device has been proposed and verified in a 65nm 1.2V CMOS process. The new proposed design with adjustable holding voltage controlled by the ESD detection circuit has better immunity against mis-trigger or transient-induced latch-on event. The layout area and the standby leakage current of this new proposed design are much ...

2014
Yoshiya Komatsu Masanori Hariyama Michitaka Kameyama

This paper presents an asynchronous high-performance FPGA that combines Four-Phase Dual-Rail (FPDR) protocol and Level-Encoded Dual-Rail (LEDR) protocol. FPDR protocol is employed to achieve small area for logic blocks, while LEDR protocol is employed to obtain high bit rate and low power for data transfer. Each logic block consists of LEDRFPDR protocol converter, FPDR-LEDR protocol converter a...

Journal: :Electronics 2023

Various hardware security concerns, such as Trojans and IP piracy, have sparked studies in the field employing alternatives to CMOS chips. Spintronic devices are among most-promising for applications that need low power consumption, non-volatility, ease of integration with silicon substrates. This article looked at how can be made more secure by utilizing special features spintronics devices. S...

2015
Chi-Hang Chan Yan Zhu Sai-Weng Sin Seng-Pan U R. P. Martins

Communication devices such as 60GHz-band receivers and serial links demand power-efficient low-resolution gigahertz-sampling-rate ADCs. However, the energy efficiency of ADCs is degraded by scaling up transistor widths in the building blocks for high speed, thus increasing the impact of intrinsic parasitics. Parallel schemes like multi-bit processing and interleaving [1], can ease the problems ...

2017
Jingzhi Zhang Huihua Liu Yunqiu Wu Chenxi Zhao Kai Kang

An ultra-wide locking range transformer-based injection-locked frequency divider (ILFD) is presented. By making use of a 4-order transformer-based resonator and an inductive gain peaking technique, the proposed ILFD can achieve high performance in terms of wide locking range and low power consumption. Fabricated in a standard 65nm CMOS process with a core area of 0.18mm, the ILFD measures a loc...

2017
Jabeom Koo Kannan Sankaragomathi Richard Ruby Brian Otis

The first fully integrated oven-controlled temperature compensation system with the transformer coupled Colpitts oscillator is developed by 65nm CMOS tech. This work achieves ±1.55ppm frequency stability over the 85C temperature range which can be used for the GPS application (<2ppm). An integrated heater in the FBAR chip consumes 14mW power at maximum. The temperature resolution of TDC is 150u...

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