نتایج جستجو برای: sigma delta modulator
تعداد نتایج: 93241 فیلتر نتایج به سال:
This paper mainly explores how oversampling and feedback can be employed in high-resolution modulators to extend the signal bandwidth into the range of megahertz, where oversampling ratio is constrained. A 2-1 cascaded multi-bit architecture suitable for broad-band applications is presented, and a linearization technique referred to as partitioned data weighted averaging (DWA) is introduced to ...
In this paper by using an exactly analytic approach the clock jitter in the feedback path of the continuous time Delta Sigma modulators (CT DSM) is modeled as an additive jitter noise, providing a time invariant model for a jittery CT DSM. Then for various DAC waveforms the power spectral density (psd) of the clock jitter at the output of DAC is derived and by using an approximation the in-band...
Power consumption is the major issue in VLSI design. In this paper an efficient low power first order sigma delta modulator is designed for oversampled ADC using floating gate folded cascode operational amplifier, in 0.35 μm Technology. Floating gate MOSFET have low power Dissipation hence it is an attractive solution in design of data converters, low voltage op -amp with rail-to-rail input and...
This paper presents an overview of DelSi, a MATLAB toolbox developed for the design and simulation of delta–sigma modulators. The DelSi toolbox can synthesize a stable noise-transfer function for complex network structures. The modelling tool consists of two crc programs, sdMod.c, a single stage delta–sigma modulator and firfilt.c, a decimating FIR filter. Cascaded modulators can be constructed...
Continuous-time delta sigma (CT-4Σ) ADCs are established as the data conversion architecture of choice for the next-generation wireless applications. Several efforts have been made to simultaneously improve the bandwidth and dynamic range of 4Σ ADCs. We proposed using two-step quantizer in a single-loop CT-4Σ modulator to achieve higher conversion bandwidth. This paper presents a tutorial for e...
This paper presents a BIST scheme to test and calibrate on-chip DAC and ADC and to improve both linearity and resolution of converters using a built-in sigma-delta modulator. We use a dithering dynamic element matching (DEM) techniques. A first-order sigma-delta modulator is used to sample DAC outputs because of high linearity of its outputs with high oversampling rate (OSR). The scheme is capa...
نمودار تعداد نتایج جستجو در هر سال
با کلیک روی نمودار نتایج را به سال انتشار فیلتر کنید