A method for integrated circuit image processing is proposed. It makes easier a topology reconstruction process and is able to successfully process images scanned from an integrated circuit layer. Implementation of image analysis techniques accelerates the process of reverse engineering as well as a quality control and analysis of integrated circuits. The idea of sequential raster-to-vector and...

Unidirectionally coupled phase oscillators in a ring are simple structures but unsuitable for application central pattern generators (CPGs) six-legged walking due to coexisting stable synchronization patterns. This paper shows that the can be applied CPG by utilizing non-periodic signal generator as clock. The clock-driven implemented sequential logic circuit using field programmable gate array...

In this study, we present an automated algorithm that partitions large sequential VLSI circuits for pseudoexhaustive testing. The partitioning algorithm is based on the primary input cone and fanout value of each node in the circuit. We have developed an optimization process that can be used to find the optimal size of primary input cone and fanout values, to be used for partitioning a given ci...

In recent years, reversible logic has emerged as a promising computing paradigm showing its applications in various fields like low power computing, quantum computing, nanotechnology, optical computing and DNA computing. This paper proposes different sequential circuit elements of reversible gates and its application in the designing of different weighted counters. These synchronous reversible ...

Shorts and opens are the most common types of catastrophic defects in today's CMOS ICs. In this paper we show that an open in the interconnect wiring of a digital CMOS circuit, which permanently disconnects inputs of logic gates from their driver, can cause oscillation or sequential behavior. We present supporting experimental data collected by creating an interconnect open in a manufactured ch...

Shorts and opens are the most common types of defects in today’s CMOS ICs. In this paper we show for the first time that an open in the interconnect wiring of a digital CMOS circuit can cause oscillation or sequential behavior. We also analyze and compare the factors affecting the probabilities for an interconnect open and a feedback bridging fault to oscillate or display sequential behavior.

This paper studies single-fault fault collapsing in sequential logic circuits. Two major phenomena, self-hiding (SH) and delayed reconvergence (DR), which arise from the existence of feedback paths and storage elements in sequential circuits, are analyzed and found to cause the dominance relationship which is valid in combinational circuits but no longer valid in sequential circuits. A fault-co...

The action systems framework for modelling parallel programs is used to formally specify a microprocessor. First the microprocessor is specified as a sequential program. The sequential specification is then decomposed and refined into a concurrent program using correctnesspreserving program transformations. Previously this microprocessor has been specified at Caltech, where an asynchronous circ...

Grain and Trivium are two hardware oriented synchronous stream ciphers proposed as the simplest candidates to the ECRYPT Stream Cipher Project, both dealing with 80-bit secret keys. In this paper we apply the linear sequential circuit approximation method to evaluate the strength of these stream ciphers against distinguishing attack. In this approximation method which was initially introduced b...