one the challenging in hardware performance is to designing a high speed calculating unit. the higher of calculations speeds in a computer system  will be pointed out in terms of performance. as a result, designing a high speed calculating unit is of utmost importance. in this paper, we start design whit this knowledge that one multiplier made of several adder and one divider made of several su...

the rotor of enegelberg whitener was equipped with a screw conveyor to reduce broken rice percentage. according to preliminary experiments this modification could reduce broken rice percentage about 2.5%. further experiment was performed to determine the effect of rotor speeds and blade positions on white rice quality. to do this, five rotor speeds, consisting 500, 600, 700, 800 and 900 r.p.m a...

Failure was not an option. We had a very short time to make an important application perform very much better. Obviously we couldn’t do a complete rewrite. However, we were fortunate enough to have use of a full-sized server to test some tuning strategies. Thorough research into best practices around OS buffering and filesystem alternatives turned up some simple hypotheses to test. Once we set ...

Many of today's experimental electronic devices can successfully operate at frequencies far above 100 GHz. However, at these frequencies, characteristics of the interconnecting medium often become the limiting factor in the overall performance of high-speed circuits, restricting their maximum operating bandwidth. Speed limitations imposed by the interconnects will be even more severe in future ...

telemedicine has changed the way of health care. it is an indispensable tool in the hands of doctors to accelerate and facilitate the process of data interchange. wireless networks consist of small nodes with communications capabilities. development of wireless networks of telemedicine system is highly demanded since these networks promise a wide range of potential applications. in this paper t...

A flexible and reconfigurable signal processing ASIC architecture has been developed, simulated and synthesized. The proposed architecture can be used to realize any one of several functional blocks needed for the physical layer implementation of high speed data communication systems operating at symbol rates over 60 Msamples/sec. In fact, multiple instances of a chip based on this architecture...

The speed of CPUs and memories has historically outstripped I/O, but emerging network and storage technologies promise to invert this relationship. As a result, fundamental assumptions about the role of the operating system in computing systems will have to change. We propose an operating and application architecture that removes the CPU and memory from the path of high-speed I/O. In our model,...

Pumps are designed and manufactured to operate well away from the cavitation condition and thus the factors affecting the onset of cavitation are important. A specially designed test rig was and constructed so that the onset of cavitation could be studied visually while obtaining actual NPSH data. The magnitude of the NPSH level at 3% drop in total discharge head of a pump was determined at dif...

A hydraulic excavator has a number of devices attached, the operating speeds of which are important performance indicators for performance evaluation and end-of-line inspection. This paper proposes an online and low-cost detection method to estimate the operating speed based on the peak detection of the main pump outlet pressure. A pressure sensor is installed on the main pump discharge point o...

At the present time, when the usage of super-computers has been brought into play and turned out to be more widespread, the research of Asymmetric Operating Systems has been gathering speed, because super-computers more often than not run an Asymmetric Operating System. In this paper some new algorithms and implementations designed in our group and based on our ASOSI framework are presented.