We describe a new method for determining component values and transistor dimensions for CMOS operational amplifiers (op-amps). We observe that a wide variety of design objectives and constraints have a special form, i.e., they are posynomial functions of the design variables. As a result, the amplifier design problem can be expressed as a special form of optimization problem called geometric pr...

A new approach for CMOS op-amp circuit synthesis has proposed here. The approach is based on the observation that the rst order behavior of a MOS transistor in the saturation region is such that the cost and the constraint functions for this optimization problem can be modeled as convex functions. Second order e ects are then handled by formulating the problem as one of solving a sequence of co...

This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author’s copyright. In most cases, these works may not be reposted without the explicit permission of the copyrig...

Nullor elements have applications not only in analog behaviour modeling but also in analog circuit design and analysis. Fixator-norator pair, the emerging tool in analog design is a combination of a nullor and sources. A method for the realization of fixator-norator pair is discussed in this paper. Application of fixator-norator pair into a circuit makes it possible to perform the AC and DC des...

A class A/B BiCMOS power op-amp designed to drive the L/R load of a disk drive head actuator is presented. The amplifier uses totem pole NMOS outputs instead of bipolar devices to avoid the high collector resistance in the simplified process used. A unique floating buffer technique regulates the quiescent totem pole current of the output devices and provides control for deep triode NMOS operati...

In this study, a low-cost quadrature triangle oscillator using voltage-controlled closed-loop dual operational amplifier (Op-Amp) architecture is proposed. Unlike other typical designs, does not require any passive components. The use of an Op-Amp-based circuit attractive for because it more cost-effective than microcontroller-based solution. This especially true sinusoidal pulse width modulati...

This paper discusses the design of a compensator for the buck DC switching converter. Three different compensators are designed and analyzed based on phase and gain margins. Op-amp implementations for each compensator are derived and tested with an example converter. The performance of the converters is examined based on transient response and rejection of steady-state error due to a step chang...

A proposed third-order noise-shaping accelerometer interface circuit enhances the signal-to-noise ratio, compared with previously presented interface circuits. The solution for the two-chip implementation is described and a novel cross-coupled correlated double sampling integrator is proposed. This scheme functions even with large parasitic capacitances between the sensor and the interface circ...

This work proposes a 10b 170MS/s 0.18um CMOS pipeline ADC based on a double-channel op-amp sharing scheme to minimize power consumption. All the amplifiers of the ADC are continuously processing dual-channel signals regardless of clock phases. The measured differential and integral nonlinearities of the ADC are less than 0.31LSB and 0.72LSB. The prototype ADC with an active die area of 1.28mm s...

A high gain, high frequency single stage CMOS op amp is designed and simulated. The authors used gain boosting technique and common mode feedback circuitry on a differential input/ouput 0.5μm CMOS amplifier. Results comprehend a DC gain of 110 dB, a unity-gain frequency superior to 300MHz associated with a phase margin in the range of 60 degrees. Good insensivity to temperature, voltage rail le...