This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning algorithm and the accelerator architecture with its modules and operation, and evaluate the accelerator with respect to two different application scenarios. The first is an embedded computing scenario where the accelera...

A design study has been performed for a positron beam with an energy of 500 MeV to be realized at the applied physics area Mainz Microtron MAMI. Positrons will created after pair conversion bremsstrahlung, produced by 855 electron af MAMI in tungsten converter target. From two conceivable geometries (i) bremsstrahlung target itself, and (ii) separated lead foil, former was considered detail. se...

The light collection of several fiber configurations embedded in a box-shaped plastic scintillating counter was studied by scanning with minimum ionizing electrons. read out silicon photomultipliers at both ends. yield produced the 855-MeV beam Mainz Microtron showed strong dependence on transverse distance from position to fibers. observations were modeled attributing indirect inside and direc...

The Unified Accelerator Libraries[1] are designed as a customizable and extendible environment for developing diverse accelerator applications. Its main architectural principle is a separation of physical entities and mathematical abstractions from algorithms. The accelerator algorithms are implemented as classes that share data via Common Accelerator Objects (Element, Bunch, Twiss, etc.). This...

An overview of the framework of Unified Accelerator Libraries (UAL) is presented. The UAL framework is a necessary and logical step in the UAL evolution. It intends to offer a standard-based infrastructure that facilitates compatible and independent implementation of accelerator applications and the development of interoperable Accelerator Simulation Facilities. The paper explain the two major ...

We present a flexible accelerator designed for networking applications. The accelerator can be utilized efficiently by a variety of Network Processor designs. Many Network Processors employ hardware accelerators for implementing key domain-specific tasks. New applications require new tasks, such as pattern matching, to be performed on network packets in real-time. Using our proposed accelerator...