Quantum information processing technology is in its pioneering stage and no efficient method for synthesizing quantum circuits has been introduced so far. This paper introduces an efficient analysis and synthesis framework for quantum logic circuits. The proposed synthesis algorithm and flow can generate a quantum circuit using the most basic quantum operators, i.e., the rotation and controlled...

This paper presents a new approach to logic synthesis of digital synchronous circuits. We present a model for synchronous circuits that supports logic transformations aimed at optimizing the circuit performance. Previous synthesis approaches attacked this problem by separating the combinational logic from the registers and by applying circuit transformations to the combinational component only....

A new method is introduced for the synthesis for logical initializability of synchronous state machines. The goal is to synthesize a gate-level implementation that is initializable when simulated by a 3-valued (0,1,X) simulator. The method builds on an existing approach of Cheng and Agrawal, which uses constrained state assignment to translate functional initializability into logical initializa...

For some time we have been exploring methods of transforming functional specifications into hardware implementations that are suitable for production. The complexity of this task and the potential value have continued to grow with the increasing complexity of processor design and the mounting pressure to shorten machine design times. This paper describes the evolution of the Logic Synthesis Sys...

The failure rate of logic circuits due to high-energy particles originating from outer space has been increasing dramatically over the past 10 years. Whereas soft errors have traditionally been of much greater concern in memories, smaller feature sizes, lower voltage levels, higher operating frequencies, and reduced logic depth are projected to cause a dramatic increase in soft error failure ra...

This paper presents theory and practical implementation of a method for multi-level logic synthesis of speedindependent circuits. An initial circuit implementation is assumed to satisfy the monotonous cover conditions but is technology independent. The proposed method performs both combinational (inserting new gates) and sequential (inserting new memory elements) decomposition of complex gates ...

Memristors have become interesting to many research areas within the last years. This paper discusses memristors in the context of digital logic synthesis. Giving a brief overview about memristor characteristics it is explained how they can be used in digital logic. It will be explained how memristors map to digital logic operations and how this can be used with common synthesis methods to turn...

Church’s synthesis problem asks whether there exists a finite-state stream transducer satisfying a given input-output specification. For specifications written in Monadic Second-Order Logic over infinite words, Church’s synthesis can theoretically be solved algorithmically using automata and games. We revisit Church’s synthesis via the Curry-Howard correspondence by introducing SMSO, a non-clas...

Reducing the ever-growing leakage current is critical to high performance and power efficient designs. We present an in-depth study of high-level leakage modeling and reduction in the context of a full custom design environment. We propose a methodology to estimate the circuit area, minimum and maximum leakage current, and maximum power-up current, introduced by leakage reduction using sleep tr...

Today’s rapid advances in the physical implementation of quantum computers call for scalable synthesis methods to map practical logic designs to quantum architectures. We present a synthesis framework to map logic networks into quantum circuits for quantum computing. The synthesis framework is based on LUT networks (lookup-table networks), which play a key role in state-of-the-art conventional ...