This paper presents a comprehensive survey of existing techniques for interconnect optimizationduring the VLSI physical design process, with emphasis on recent studies on interconnect design and optimization for high-performance VLSI circuit design under the deep submicron fabrication technologies. First, we present a number of interconnect delay models and driver/gate delay models of various d...

We present the design of an ATM-based interconnect that serves as a high speed packet-switched equivalent of an I/O bus in a workstation/server. By effectively “extending” an external ATM network into the desk-area, the interconnect also functions as a high performance host-network interface. The prototype interconnect, which we are building as part of an ARPA sponsored gigabit local ATM testbe...

The Slingshot interconnect designed by HPE/Cray is becoming more relevant in high-performance computing with its deployment on the upcoming exascale systems. In particular, it empowering first and highest-ranked supercomputer world, Frontier. It offers various features such as adaptive routing, congestion control, isolated workloads. of newer interconnects sparks interest related to performance...

Since interconnect is becoming a limiting constraint for microelectronics technology, VLSI design curricula and supporting CAD tools require significant change. We describe the introduction of Rensselaer’s Interconnect Performance Estimator (RIPE) into a VLSI design class.