The timing analysis and optimization of sequential circuits become more and more important with the advances of VLSI technologies. We should cope with the clock frequency more than 2 GHz near the future. The clock frequencies of sequential circuits are decided based on the maximum delay time of paths between clocked flip-flops under the assumption that all paths propagate signals within one clo...

This paper presents a novel technique to evaluate the noncontrollability measures of state registers for partial scan design. Our model uses implicit techniques for finite state machine (FSM) traversal to identify noncontrollable state registers. By implicitly enumerating the states of a machine, we accurately evaluate the noncontrollability of flip–flops by determining exactly what values can ...

The state space of every continuous multi-stable system is bound to contain one or more metastable regions where the net attraction to the stable states can be infinitely-small. Flip-flops are among these systems and can take an unbounded amount of time to decide which logic state to settle to once they become metastable. This problematic behavior is often prevented by placing the setup and hol...

We prove that the orbifold quantum ring is preserved under singular symplectic flops. Hence we verify Ruan’s conjecture for this case.