A two-dimensional numerical analysis is presented to investigate the field effect transistor characteristics, the influence of the geometry of the component like distance between the gate and drain, or between gate and source. All simulations revealed the existence of a high electric field region near the gate contact, who create a depopulated zone around the gate, but the preceding studies hav...

A three-dimensional (3D) fin-shaped field-effect transistor structure based on III-V metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication has been demonstrated using a submicron GaAs fin as the high-mobility channel. The fin-shaped channel has a thickness-to-width ratio (TFin/WFin) equal to 1. The nano-stacked high-k Al2O3 dielectric was adopted as a gate insulator in forming ...

Double-Independent-Gate (DIG) Field Effect Transistors (FETs) are expected to extend Moore’s law in the coming years. Many emerging technologies present the possibility to have DIG FETs with one gate controlling online the device polarity. Such devices are called ambipolar transistors and efficiently embed the XOR function. Logic gates based on ambipolar transistors can implement more complex l...

Quasi-planar tri-gate (QPT) bulk metal-oxidesemiconductor field-effect transistors (MOSFETs) are fabricated by a low-power 28-nm complementary metal-oxide-semiconductor (CMOS) technology, in order to investigate the effect of double-patterning and double-etching (2P2E) on the line-edge-roughness (LER) as well as on the LER-induced threshold-voltage (VTH) variation. We experimentally verified th...

Electron transport in ultrathin double-gate (DG) silicon-on-insulator (SOI) devices is studied as a function of the transverse electric field and the silicon layer thickness, with particular attention to the evaluation of stationary drift velocity and low-field mobility at room temperature. A one-electron Monte Carlo simulator has been used.  2001 Elsevier Science B.V. All rights reserved.

The effect of surface-roughness scattering on electron transport properties in extremely thin double gate silicon-on-insulator inversion layers has been analyzed. It is shown that if the silicon layer is thin enough the presence of two Si–SiO2 interfaces plays a key role, even for a very low transverse effective field, where surface-roughness scattering is already noticeable, contrary to what h...

High electron mobility transistors (HEMTs) based on III–V semiconductor materials have been investigated as these devices are scaled down to gate lengths of 120, 90, 70, 50 and 30 nm. A standard Monte Carlo (MC) method coupled with the solution of Poisson’s equation is employed to simulate a particle transport. The average particle velocity and the field–momentum relaxation time are studied in ...

Active modulation of ions and molecules via field-effect gating in nanofluidic channels is a crucial technology for various promising applications such as DNA sequencing, drug delivery, desalination, and energy conversion. Developing a rapid and facile fabrication method for ionic field-effect transistors (FET) over a large area may offer exciting opportunities for both fundamental research and...

The design of double gate n-channel transistor named as junctionless vertical slit field effect transistor (JL VeSFET) is demonstrated in this paper. JLVeSFET is novel twin gate device which turns on and off depending upon the extension of depletion region from two gates inside the channel. It is observed that it offers very low OFF current with ideal subthreshold slope. JLVeSFET is compared wi...