We have successfully aligned single-walled carbon nanotubes (SWNTs) in patterns with nanoscale width, micron-scale length and controllable pitch on SiO2/Si substrates using a poly(dimethysiloxane) (PDMS) microchannel mold. The microchanneled mold was patterned with a funnel-shaped channel to minimize nanotube jamming during capillary-driven inflow. Two (i.e. preand post-capillary) gas blows wer...

The p-i-n carbon nanotube (CNT) devices suffer from low ON/OFF current ratio and small saturation current. In this paper by band bending engineering, we improved the device performance of p-i-n CNT field effect transistors (CNTFET). A triple gate all around structure is proposed to manage the carrier transport along the channel. We called this structure multi-segment gate (MSG) CNTFET. Band to ...

Circuit-level implementation of a novel neuron has been discussed in this article. A low-power Activation Function (AF) circuit is introduced in this paper, which is then combined with a highly linear synapse circuit to form the neuron architecture. Designed in Carbon Nanotube Field-Effect Transistor (CNTFET) technology, the proposed structure consumes low power, which makes it suitable for the...

Background and Objectives: In recent decades, due to the effect of the short channel, the use of CMOS transistors in the nanoscale has become a major concern. One option to deal with this issue is the use of nano-transistors. Methods: Using nano-transistors and multi-valued logic (MVL) can reduce the level of chips and connections and have a direct impact on power consumption. The present study...

In high speed applications, multipliers and their associated circuits like accumulators, half adders, and full adders consume a significant portion. Therefore, it is necessary to increase their performance as well as size efficiency. In order to reduce the hardware complexity which ultimately reduces an area and power, energy efficient full adders plays crucial role in Wallace tree multiplier. ...