Abstract This project deals with design of analog to digital converters for software radio applications. Among various ADC architectures, continuous time bandpass (CTBP) sigma-delta ADC was found to be the best architecture for software radio applications. A new CTBP sigma-delta architecture with NRZ DAC is proposed for improved jitter performance. A complete on-chip solution with integrated PL...

A substrate isolated LDO for an inductively powered retinal implant to generate a negative substrate voltage of −2V out of a more negative rectified voltage down to −7V is presented. Due to the fact that the negative rectified input voltage is negative relative to substrate, the LDO has to be completely isolated against substrate. The LDO has an Open Loop Gain of 66dB and a PSRR of −81dB at low...

Quiescent power supply current monitoring (looa) has been shown to be effective for testing CMOS devices. BiCA4OS is emerging as a major technologv for high speed, high performance, digital and mixed signal applications. Stuck-ON faults as well as bridging faults in BiCMOS circuits cause enhanced IDDo. An input pattern classi$ation scheme is presented for detection of stuck-ONhridging faults ca...

• Identification of the optimum technology and layout of the tracking detectors for the upgraded ATLAS ID and construction of a short-strip silicon detector (SSD) module with sufficient radiation hardness for the intermediate and outer tracking region in the upgraded ATLAS ID. • Evaluation of integrated circuit technologies for the readout of the upgraded ATLAS ID, in particular the evaluation ...

We describe an immunoassay utilizing standard CMOS technology. An array of Hall sensors is used to detect the magnetic beads that serve as the assay signal. Electrical and magnetic modulation is employed to improve the sensitivity of the sensors. The devices receive two post-processing steps to improve sensitivity and biocompatibility. We have fabricated prototype devices using a 0.25-μm BiCMOS...

A fully integrated pulsewidth modulator for Class-S power amplifiers is presented. It consists of a triangular signal generator, a comparator and output buffer. The HBT BiCMOS design of PWM circuit is applied to the LTE frequency range, which converts digitally modulated 955MHz RF carrier with 2.87GHz sampling clock. This PWM shows an EVM 6.6%, a differential output voltage swing 1.35Vp-p with ...

Studies have been performed on the effects of radiation on ASICs incorporating bipolar npn transistors in the AMS 0.8 μm BiCMOS process. Radiation effects are reviewed and the approach used to achieve radiation tolerant ASICs is described. The radiation tests required to validate the ASICs for use in the ATLAS detector at the CERN Large Hadron Collider are discussed. The results demonstrate tha...

AUTO-CALIBRATION has been used in monolithic ADCs to extend the limits of accuracy and stability imposed bl processing, packaging, temperature, and aging’.’. This paper describes a self-calibrating. 18-bit. serial-output. lOOksps ADC which is implemented on two chips: a ?BV BiCMOS analog chip, and a 5V 2@ CMOS digital chip. This partitioning allows a larger input signal for better dynamic range...

In this paper, two fully-differential low noise amplifiers based on classical cascode topologies are presented. The first one is enhanced with noise canceling technique and the second one is based on a negative feedback stage. These circuits have been designed to fulfill the lower band of SKA requirements with a 1.5 GHz bandwidth below 2 GHz. Both chips have been implemented using NXP QUBIC4G S...

A novel 12 GHz VCO designed and fabricated in a 0.18μm SiGe BiCMOS technology is presented. Strongly magnetic coupled dual LC tanks with fixed and tunable capacitive elements are introduced to extend tuning range and improve phase noise. By hybrid using of varactor tuning, loaded transformer tuning and switched capacitor tuning, the proposed VCO achieves a wide tuning range of 4.3GHz (36%) and ...