Transmembrane lipid translocation (flip-flop) processes are involved in a variety of properties and functions of cell membranes, such as membrane asymmetry and programmed cell death. Yet, flip-flops are one of the least understood dynamical processes in membranes. In this work, we elucidate the molecular mechanism of pore-mediated transmembrane lipid translocation (flip-flop) acquired from exte...

This paper presents a method of design the counter using sequential system based on synchronous techniques. For the design the counter, first of all, we derive switching algebras and their operations. Also, we obtain the next-state functions, flip-flop excitations and their input functions from the flip-flop. Then, we propose the algorithm which is a method of implementation of the synchronous ...

We demonstrate new optical techniques for externally controlling the latchable output power of a semiconductor-optical-amplifier-based flip-flop. Optical 'set' and 'reset' signals increase and decrease the re-fractive index, respectively, via cross-phase modulation (XPM). Set signals, which deplete the carrier density, have wavelengths between 1533 and 1568 nm, and powers as low as 22 microW. R...

The four subunits of the AMPA-type glutamate receptor (GluR1-GluR4 or GluR-A-GluR-D) exist in two distinct forms, flip and flop, generated by alternative splicing of a 115 bp region. The GluR2 subunit plays a key role in determining the functional properties of the AMPA receptor channel. In this study, we examined the differences in kinetic properties between the flip and flop splice variants o...

This paper explores the energy-delay space of eight widely referred flip-flops in a 0.13μm CMOS technology. The main goal has been to find the smallest set of flip-flop topologies to be included in a “high performance” flip-flop cell library covering a wide range of power-performance targets. Based on our comparison results, transmission gate-based flipflops show the best power-performance trad...

OF THE THESIS Novel Flip-Flop Designs Tolerant to Soft-Errors and Crosstalk Effects by Aditya Jagirdar Thesis Director: Prof. Michael L. Bushnell The desire to make technology faster, smaller and more affordable compels us to shrink transistors further. As we realize designs with millions of transistors, most of the existing problems increase in severity and newer problems crop up. One major ne...

Scalability of packet switched cross-connects that utilize all-optical signal processing is a crucial issue that eventually determines the future role of photonic signal processing in optical networks. After reviewing several labeling techniques, we discuss label stacking and label swapping techniques and their benefits for scalable optical packet switched nodes. All-optical devices for impleme...

As the CMOS device becomes smaller, the process and aging variations become one of the major issues for circuit reliability and yield. Thus, a number of studies on the aging effects are currently underway. In this paper, we measure the setup/hold time and the variations considering aging effects such as a hot carrier injection (HCI) and negative bias temperature instability (NBTI) on flip-flop....