نتایج جستجو برای: all digital phase locked loop

تعداد نتایج: 2730969  

Journal: :IEEE Trans. Signal Processing 2002
Chii-Horng Chen Chong-Yung Chi Ching-Yung Chen

In this paper, Chi’s real one-dimensional (1-D) parametric nonminimum-phase Fourier series-based model (FSBM) is extended to two-dimensional (2-D) FSBM for a 2-D nonminimumphase linear shift-invariant system by using finite 2-D Fourier series approximations to its amplitude response and phase response, respectively. The proposed 2-D FSBM is guaranteed stable, and its complex cepstrum can be obt...

2009
Bogdan Alecsa Alexandru Onea

The paper proposes a way of implementing a phase locked loop (PLL) motor speed controller. The main emphasis is on the FPGA implementation of the digital PLL. The closed loop sensing element is an optical tachometer, which outputs an impulse train with a frequency proportional to the motor rotational speed. This impulse train will be synchronized by the PLL to a reference impulse train of a giv...

2003
Iboun Taimiya Sylla

In this paper, a new RF/Microwave source is presented. This source is able to generate a Continuous Waveform (CW) signal as well as a modulated signal like GFSK for Bluetooth and GMSK for GSM. The RF source presented here is based on a direct modulation All-Digital Phase-Locked-Loop (ADPLL) architecture that was originally designed for a Bluetooth transmitter in the 2.4GHz in industry, science,...

2005
Un-Ku Moon Kartikeya Mayaram Martin Vandepas Merrick Brownlee Kerem Ok Jose Silva Charlie Meyers Matt Brown Ting Wu

approved: _____________________________________________________ Un-Ku Moon Kartikeya Mayaram Circuits operating outside the earth’s atmosphere are more vulnerable to cosmic radiation and require special design consideration. The purpose of this work is to explore methods of mitigating the effect of radiation in phase locked loop (PLL) circuits. Several voltage controlled oscillators (VCOs) and ...

In this paper a new phase-frequency detector is proposed using transmission gates which can detect phase difference less than 500ps. In other word, the proposed Phase-frequency Detector (PFD) can work in frequencies higher than 1.7 GHz, whereas a conventional PFD operates at frequencies less than 1.1 GHz. This new architecture is designed in TSMC 0.13um CMOS Technology. Also, the proposed PFD a...

2004
A. A. Abbo

A VLSI circuit for demodulating the microwave landing system data format is presented. The approach is based on a secondorder all-digital phase locked loop. The primary goal of the work is to find a cost effective way of embedding the demodulator within an integrated navigation receiver built around a customised application specific processor (ASP). While the fully digital nature of the design ...

Journal: :Optics express 2012
Kenji Numata Jeffrey R Chen Stewart T Wu

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a ~40-GHz tuning range. The offset frequency noise was suppressed to the statically o...

Journal: :IEEE Transactions on Circuits and Systems I: Regular Papers 2012

2015
Shravan Kumar

This paper presents a wide range fast lock all-digital deskew buffer using a digital controlled delay line, which achieves low jitter, fast lock, low power consumption and 50% duty cycle correction. A cyclic time-to-digital converter is introduced to decrease the locking time in conventional register-controlled delay-locked loop. A balanced edge combiner to achieve 50% output clock is also pres...

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