This study presents a novel sequential Type-I optimal normal basis multiplier in GF(2) with a regular structure. The proposed multiplier has a slightly higher space complexity than the Reyhani-Masoleh-Hasan’s (RMH) multiplier, but is 27% faster than the RMH multiplier. Furthermore, the proposed multiplier is highly regular, modular, expandable and well-suited to VLSI implementation. A new norma...

| We present a new low-complexity bit-parallel canonical basis multiplier for the eld GF2 m generated by a n all-one-polynomial. The proposed canon-ical basis multiplier requires m 2 , 1 XOR gates and m 2 AND gates. We also extend this canonical basis multiplier to obtain a new bit-parallel normal basis multiplier.

The accuracy of the multiplication depends on the precision of the multiplier. The variable precision floating point multiplier will have more accuracy when compared with the fixed precision multiplier. In this paper a variable precision floating point multiplier is considered. An effective BIST test pattern generator for variable precision floating point multiplier is proposed. A BIST TPG cons...

For a fixed characteristic p and a fixed simple group G, various bicyclic extensions m.G.a may occur, where G.a is a subgroup of the automorphism group of G and m is a cyclic factor of the Schur multiplier of G.a. For each such group G.a, the information about all bicyclic extensions m.G.a that occur in the ATLAS of Finite Groups is shown together in one document. Each file starts with the name...

The present paper is an attempt to: 1- Demonstrate how money is created (by the nature of the system), and to estimate the inflation resulting from monetary factors in both usurious and non-usurious systems. Operational aspects of Islamic and non-Islamic banking systems are compared. 2- Introduce a corrective term to be added to the multiplier of the supply of money, in order to prevent the und...

Now a day’s multiplication and modulus takes crucial role so we are combining multiplication and modulus. A Novel multi-modulus multiplier with different widths of modulus operations. In this paper we have radix4 multi-modulus multiplier with 4bit, 32bit, 64bit and radix8 multi-modulus multiplier with 4bit, 32bit, 64bit.radix4 and radix8 multi-modulus multiplier using Residue multiplication is ...

Galois field arithmetic is commonly used in Reed-Solomon encoding and decoding. This paper presents the design of a combined 16-bit binary and dual Galois field (GF) multiplier. This multiplier is capable of performing either a 16-bit two’s complement or unsigned multiplication, or two independent 8-bit GF(28) multiplications in SIMD fashion. The combined multiplier is designed by modifying a c...

In digital signal processors multipliers play a major role because, high multiplication process is carried out in hardware part in digital circuits. Array multiplier also requires less space for implementation in ICs and is an efficient way of multiplication in digital integrated circuits [3-4]. In this paper we have designed and analysed a four bit array multiplier using 45nm CMOS process. Arr...