This paper constructs fully parallel NN hardware architecture, FPGA has been used to reduce neuron hardware by design the activation function inside the neuron without using lookup table as in most researches, to perform an efficient NN. It consist of two main parts; the first part covers network training using MATLAB program, the second part represents the hardware implementation of the traine...

ةـصلاخلا : ةلاحلا رايعم ثحبلا اذه يف ضرعن – ةلاحلا حشرمُــل لماشلا يبراقتلا تابثلل غارفلا – يمقرلا غارفلا عبشملا يباسحلا ضئافلا مادختساب كلذو ةددحم ةميق اذ . دقو ماظنلل ةديدج ةيصاخ ءاصقتساب رايعملا قُـتشأ ةساردلا ديق . اس رايعم عم رايعملا اذه ةنراقمب انمق امآ جنيسو راآ نم لٍآ لَـبـقِ نم هضرع مت قب . دقو جنيسو راآ رايعم نم لقأ طباوض يذ يلاحلا رايعملا نأ ةنراقملا تنابأ . و نع حرتقملا رايعملا ةعاجن ان...

In this paper, the parameters of the LTE system in DL are investigated. These parameters include the effect of the Hybrid Adaptive Repeat and Request henceforth (HARQ) on the Signal to Noise Ratio (SNR), Block Error Rate (BLER), and throughput. The paper deals with three cases of Channel Quality Indicator (CQI): 3,7 and 15.The results showed that the HARQ procedure can improve the BLER and the ...