Recent studies have shown that embedded DRAM (eDRAM) is a promising approach for 3D stacked lastlevel caches (LLCs) rather than SRAM due to its advantages over SRAM; (i) eDRAM occupies less area than SRAM due to its smaller bit cell size; and (ii) eDRAM has much less leakage power and access energy than SRAM, since it has much smaller number of transistors than SRAM. However, different from SRA...

Aggressive scaling of transistor dimensions with each technology generation has resulted an increased integration density and improved device performance at the expense of increased leakage current. Diagnosis is becoming a major concern with the rapid development of semiconductor memories. In this paper, we propose a very low cost Design-forDiagnosis (DfD) solution for design of write driver ci...

1 Research Scholar of Sagar Institute of Research & Technology, Bhopal, Madhya Pradesh, India 2 Professor, Dept. of Electronics and Communication, Sagar Institute of Research & Technology, Bhopal, Madhya Pradesh, India. __________________________________________________________________________________________ Abstract: Scaling of devices in bulk CMOS technology contributes to short channel effe...

In this paper, a hybrid memory architecture based on new array of SRAM and resistive random-access (RRAM) cells is proposed to perform in-memory computing by implementing all basic two-input Boolean functions. The can be configured as dual-purpose element. It used an in mode keep data for high-performance application requirements. also sense amplifier (SA-SRAM) reading the contents RRAMs perfor...

In order to meet all the expectations of consumers, today's technology is equipped with large capacity memories. Additional factors include power consumption and delay, which are crucial in determining how well a gadget performs. Memory an important factor many widgets, as devices get smaller, their size likewise gets less. Every computerized device, result, uses little power, speed utmost impo...

The explosive growth of battery operated devices has made low-power design a priority in recent years. Moreover, embedded SRAM units have become an important block in modern SoCs. The increasing number of transistor count in the SRAM units and the surging leakage current of the MOS transistors in the scaled technologies have made the SRAM unit a power hungry block from both dynamic and static p...

In this study, a three-dimensional “atomistic” circuitdevice coupled simulation approach is advanced to investigate the process-variation and random dopant induced characteristic fluctuations in planar metal-oxidesemiconductor field-effect-transistor (MOSFET) static random access memory (SRAM) from 65-nm to 16-nm gate length. As the gate length of the planar MOSFETs scales from 65 nm to 16 nm, ...

Industry demands Low-Power and HighPerformance devices now-a-days. Among the various embedded memory technologies, SRAM provides the highest performance along with low standby power consumption. In CMOS circuits, high leakage current in deep-submicron regimes is becoming a significant contributor to power dissipation due to reduction in threshold voltage, channel length, and gate oxide thicknes...

Portable devices demand for low power dissipation. To reduce power dissipation, the subsystem in a device needs to be designed to operate at low power and also consume low power. Significant progress has been made in low power design of dynamic RAM’s. Static RAM’s are also critical in most VLSI based system on chip applications. Basic SRAM bit cell consists of 6T. Few designs using 4T are also ...

Memory is an important part of any electronic device. In today's world static random access memory (SRAM) is widely used as memory. The major issues for design of SRAM are power loss, delay and stability. This paper presents a modified form of a symmetric eight-transistor SRAM bit-cell. In this paper transmission gate has been used as access transistor which provides rail-to-rail swing. Moreove...