Paul Hasler and Paul D. Smith Georgia Institute of Technology Atlanta, GA 30332-0250 [email protected] ABSTRACT Recently, we have characterized and modeled oating-gate circuits that adapt their oating-gate charge based upon statistics of the incoming signal. In this paper, we show signal-dependant adaptation in three oating-gate circuits. First, we show classic autozeroing oating-gate ampli...

The increasing use of mixed signal circuits with analog and digital circuitry on the same lchip have created a set of demands that traditional circuit simuiators cannot meet very well. We pmsent techniques to efficiently handle the simulation of mixed signal analog/digital circuits, a d SYMPHONY , a fast mixed-signal simulator which embodies them. SYMPHONY combines a fast simulator for digital ...

Improved Bus-con ict Detection J.Th. van der Linden M.H. Konijnenburg A.J. van de Goor Faculty of Information Technology and Systems Delft University of Technology, Delft, The Netherlands [email protected] Abstract Test Pattern Generation (TPG) for sequential and/or 3-state circuits involves two important aspects which often are handled incorrectly: Bus con ict detection and complete...

Multi-threshold CMOS (MTCMOS) is commonly utilized for suppressing leakage currents in idle integrated circuits. The deactivation/reactivation energy consumption however degrades the effectiveness of the MTCMOS technique for providing significant savings in total energy consumption in CMOS integrated circuits. The sources of mode transition energy consumption in noise-aware MTCMOS circuits are ...

AbstructSmall-signal Thevenin and Norton equivalent circuits seen looking into each terminal of the BJT and the FET are described. The application of these! circuits to writing by inspection the expressions for gain, input resistance, and output resistance of multistage amplifiers is demonstrated. The application of the circuits to the noise analysis of devices is illustrated by the calculation...

This paper presents a basic circuit concept for pulse-driven asynchronous circuits using superconducting rapid single-flux-quantum (RSFQ) logic gates. Today’s computer systems perform using a synchronous clock distributed over the whole system. The distribution of the clock signal becomes more difficult as the clock frequency increases because the wavelength of the clock signal becomes shorter ...

The article considers the problem of developing synchronous and self-timed (ST) digital circuits that are tolerant to soft errors. Synchronous traditionally use 2-of-3 voting principle ensure single failure, resulting in three times hardware costs. In ST circuits, due dual-rail signal coding two-phase control, even duplication provides a error tolerance level 2.1 3.5 higher than triple modular ...

To construct sophisticated biochemical circuits from scratch, one needs to understand how simple the building blocks can be and how robustly such circuits can scale up. Using a simple DNA reaction mechanism based on a reversible strand displacement process, we experimentally demonstrated several digital logic circuits, culminating in a four-bit square-root circuit that comprises 130 DNA strands...

A novel methodology designing for Multiple-Valued Logic voltage-mode storage circuits is introduced. Using the proposed inverter-based unit, uni-signal controlled pass gates and True Single-Phase Clocked Logic-based output units, efficient r-ary (where r is the radix) dynamic and pseudo-static latches can be designed. They exhibit regular, modular, and iterative structure, which means that the ...

An on-chip signal conditioning CMOS Integrated Circuit on Si (111) was fabricated for use in multi-point neural activity recording. The two-dimensional (2D) micro-Si probe array for neural activity recording sensor can be fabricated on the IC by Vapor-Liquid-Solid (VLS) growth method. However, the circuit has to be fabricated on Si (111) wafer because micro-Si probe is grown perpendicularly onl...