We present a novel technique to automatically calculate an initial sizing of analog circuits that conforms to good design practice. The method is purely (DC) simulation-based and does not need symbolic design equations or user design knowledge. It identifies the space of feasible design parameters based on implicit specifications, which arise from the circuit topology. A sizing centered within ...

An interconnect joining a source and a sink is divided into xed length uniform width wire segments and some adjacent segments have bu ers in between The problem we considered is to simultaneously size the bu ers and the segments so that the Elmore delay from the source to the sink is minimized Previously no polynomial time al gorithm for the problem has been reported in literature In this paper...

This paper presents an overview of recent advances on modeling and layout optimization of devices and interconnects for high-performance VLSI circuit design under the deep submicron technology. First, we review a number of interconnect and driver/gate delay models, which are most useful to guide the layout optimization. Then, we summarize the available performance optimization techniques for VL...

We consider the problem of determining realistic and easy-to-schedule lot sizes in a multiproduct, multistage manufacturing environment. We concentrate on a specific type of production, namely, flow shop type production. The model developed consists of two parts, lot sizing problem and scheduling problem. In lot sizing problem, we employ binary integer programming and determine reorder interval...

In this paper, we study the wire sizing and wire spacing problem for post-layout performance optimization under Elmore delay model. Both ground capacitance and coupled capacitance in a wire are included in interconnect delay calculation. Combined with general ASIC design flow, we construct section constraint graph in each routing region and use the graph to guide segment sizing and spacing. By ...

This chapter intends to give an overview of the literature on dynamic lot-sizing models and stochastic transshipment models. These two types of models are used as a basis for developing models with substitution in the following chapters. Section 2.1 contains a classification of models for dynamic lot-sizing / production planning, and selected models. In Sect. 2.2, we give a brief overview of av...

An experimental and analytical investigation of sampling, which focused on the sizing of population for optimum performance, was performed using the OneMax problem. A fixed-size population and population sizes that vary according to the number of samples were considered in this study. For the case of varying population sizes, population sizing models that ensure proper decision making of the GA...

Ensuring building-block (BB) mixing is critical to the success of genetic and evolutionary algorithms. This study develops facetwise models to predict the BB mixing time and the population sizing dictated by BB mixing for single-point crossover. Empirical results are used to validate these models. The population-sizing model suggests that for moderate-to-large problems, BB mixing—instead of BB ...

Frequency control can be considered to be one of the most crucial aspects of ancillary services. This paper revises the current basics of calculating the factors used in these control schemes, showing limitations of these, thus highlighting the need for new sizing methods. The basis for implementing these is presented, along with an explanation why it is not desirable to implement completely ne...

We consider the single item capacitated lot sizing problem a well known produc tion planning model that often arises in practical applications and derive new classes of valid inequalities for it We also derive new easily computable valid inequalities for the continuous knapsack problem The continuous knapsack problem has been introduced recently and has been shown to provide a useful relaxation...