Quantum and reversible logic circuits have more advantages than the common circuits, like low power consumption. These circuits are good choice to design future computers. One of the important issues in reversible logic is parity preservation. If parity of inputs and outputs are equal in reversible gate, this gate will be parity preserve. Reversible circuits made by these gates are parity prese...

© 2014 AENSI Publisher All rights reserved. To Cite This Article: Zahra Khadem, Design of an optimized Reversible Ternary and Binary Bidirectional and Normalization Barrel Shifters for Floating Point Arithmetic, Adv. Environ. Biol., 8(10), 1432-1444, 2014 INTRODUCTION Although traditional computers with the advent of VLSI and ULSI technologies are constructed in smaller dimensions and high proc...

In this paper a novel all-optical logic NAND, NOR and XOR gate based on nonlinear directional coupler theory is demonstrated. We use the identical structure which contains three waveguides, for designing these gates; the only difference however, is the power of inputs light beam. In other words, while a beam with 4 W/μm in power considered as logical one, the output is NAND gate and if a beam w...

In this paper a novel all-optical logic NAND, NOR and XOR gate based on nonlinear directional coupler theory is demonstrated. We use the identical structure which contains three waveguides, for designing these gates; the only difference however, is the power of inputs light beam. In other words, while a beam with 4 W/μm in power considered as logical one, the output is NAND gate and if a beam w...

Embedded digital signal processors and general purpose processors will use barrel shifters to manipulate data. This paper will present the design of the barrel shifter that performs logical shift right, arithmetic shift right, rotate right, logical shift left, arithmetic shift left, and rotate left operations. The main objective of the upcoming designs is to increase the performance without pro...

Overcoming the IC power challenge requires signal energy recovery, which can be achieved utilizing adiabatic charging principles and logically reversible computing in the circuit design. This paper demonstrates the energyefficiency of a Bennett-clocked adiabatic CMOS multiplier via a simulation model. The design is analyzed on the logic gate level to determine an estimate for the number of irre...

We present an overview and analysis of existing work in the design of online testable reversible logic circuits, as well as propose new approaches for the design of such circuits. We explain how previously proposed approaches are unnecessarily high in overhead and in many cases do not provide adequate fault coverage. Proofs of the correctness of our approaches are provided, and discussions of t...