Network-on-Chip (NoC) architectures represent a promising design paradigm to cope with increasing communication requirements in digital systems. Network-on-chip (NoC) has emerged as a vital factor that determines the performance and power consumption of many-core systems. A novel switching mechanism, called virtual circuit switching, is implemented with circuit switching and packet switching. A...

In this paper, we present network-on-chip (NoC) design and contrast it to traditional network design, highlighting both similarities and differences between NoCs and traditional networks. As an initial case study, we examine network congestion in bufferless NoCs. We show that congestion manifests itself differently in a NoC than in a traditional network. This both reduces system throughput in c...

Networks-on-chip (NoC) have been used as an interesting option in design of communication infrastructures for embedded systems, providing a scalable structure and balancing the communication between cores. Because several data packets can be transmitted simultaneously through the network, an efficient routing strategy must be used in order to avoid congestion delays. In this paper, ant colony a...

A true application-specific Network-on-Chip (NoC) requires the exact knowledge of the internal traffic behavior during the NoC is fully running the target application. Therefore, an accurate traffic measuring method is necessary. In this work, a simple but powerful traffic monitoring system is presented for the accurate evaluation and refinement of an application-specific NoC. The traffic monit...