the lut block in eastern iran is a micro-continental block within the convergent orogen between the arabian, eurasian and indian plates. large areas of the north-central, eastern, and western lut block are covered by volcanic rocks of paleogene, neogene and quaternary age.  peak volcanic activity took place in the north-central part of the lut block during the eocene, and then dramatically decr...

Field-Programmable Gate Arrays are interesting, general-purpose computational devices because (1) they have high computational density and (2) they have finegrained control of their computationalresources since each gate is independently controlled. The earlier provides them with a potential 10 advantage in raw peak performance density versus modern microprocessors. The later can afford a 32 ad...

With the on-going research to introduce multimedia capabilities into digital mobile communication systems, communication standards specify the use of enabling technologies such as the 3-channel W-CMDA mobile station modulator [1]. Pulse-shaping 1:4 interpolated FIR filters are employed in each band-limited Quadrature Phase Shift Keying (QPSK) modulator to provide in-band spectral shaping while ...

Introduction LUT is an acronym for Look Up Table. As LUT techniques become more common for Color correction applications, users are often confused by the multiplicity of available solutions present on the market. Purpose of this document is to present in a simple way the pros and cons of the different techniques and to emphasize on most important features of each solution to help customer decis...

This paper presents multiple LUT cascade to realize an address generator that produces unique addresses ranging from 1 to k for k distinct input vectors. We implemented six kinds of address generators using multiple LUT cascades, Xilinx’s CAM (Xilinx IP core), and an address generator using registers and gates on Xilinx Spartan-3 FPGAs. One of our implementations has 76% more throughput, 29.5 t...

In this paper, we describe a new technique for locating faulty Lookup Tables (LUTs) in FPGA-based reconfigurable systems. The technique is in-place (does not alter the routing structure of the LUT network) and is based on pseudo-exhaustive Built-In Self-Test where each configured LUT is tested exhaustively. Our technique involves selective reprogramming of the LUTs and takes advantage of partia...

In this letter, we propose new driving methods for designing a driver independent of the current property of Organic Light Emitting Diodes (OLED) displays. The proposed methods are the Look-Up Table (LUT) and the Pulse Width Modulation (PWM). The LUT is used to handle the amount of the current for driving the OLED display panel and the PWM is applied to represent the gray scale on the OLED disp...

In a recent paper we have proposed a method for inverse halftoning of monochrome images. It is a Look Up Table (LUT) based method, obtained from the histogram gathered from a few sample halftone images and corresponding original images. The method is extremely fast (no ltering is required) and the image quality achieved is comparable to the best methods known for inverse halftoning. The method ...

Hardware design for high performance computing appears to be reaching its limits on several fronts. In the desktop microprocessor world, clock speeds seem to have reached their peak somewhere below 10 GHz. Power consumption has begun to approach, and in some cases surpass, 100 W. These issues, along with the problems of managing designs of approximately a billion transistors have caused one of ...