Traditional priority-driven real-time kernels distinguish between tasks, which are scheduled and dispatched by a software scheduler, and (possibly different kinds of) interrupt service routines (ISRs), which are scheduled and dispatched by the hardware platform. In our Sloth system, we get rid of the software scheduler and let the hardware do the scheduling and dispatching work for tasks, too. ...

Hardware/Software Co-Design usually encounters serious problems to guarantee strong real-time constraints while serving many interrupt routines. We present an enhanced register-based RISC processor, which is capable of launching every interrupt routine within two clock cycles. This processor is implemented as soft IP-Module and features a customizable instruction set, extensive parameterization...

During conversations, participants do not always alternate turns smoothly. One cause of disturbance particularly prominent in multiparty dialogue is the presence of interruptions: interventions that prevent current speakers from finishing their turns. Previous work, mostly within the field of sociolinguistics, has suggested that the gender of the dialogue participants plays an important role in...

In this paper, we present an experiment investigating in the proper way to interrupt a continuous low priority task for an intermittent high priority task. The interrupt notification must be designed to be perceptually clear yet minimize any negative effects to carrying out the overall tasks, such as simple annoyance, disruption in the contextual flow of the on-going tasks, and even memory degr...

The importance of accounting for interrupts in multiprocessor real-time schedulability analsysis is discussed and three interrupt accounting methods, namely quantum-centric, task-centric, and processor-centric accounting, are analyzed and contrasted. Additionally, two special cases, dedicated interrupt handling (i.e., all interrupts are processed by one processor) and timer multiplexing (i.e., ...

In hardware transactional memory system, selecting an interrupt handling mechanism is the one of problems. To handle interrupts occur in transactions, all systems need special mechanisms but these require more hardware or software resources, so this is not acceptable to the embedded system that has limitations. In this paper, we proposed interrupt handling process and interrupt controller that ...