The creation of a multilevel system interconnections in submicron integrated circuits makes it possible to reduce the electrical resistance conductive tracks, parasitic capacitance between conductors, and increase speed microelectronic devices. It is proposed form transverse profile current-carrying tracks multilayer metallization an isosceles trapezoid with angles at lower base equal 75–85 deg...

This Special Issue of the IEEE JOURNAL OF SOLID-STATE CIRCUITS features expanded versions key articles presented at 2020 Custom Integrated Circuits Conference (CICC), one IEEE’s first conferences to go fully virtual due corona virus pandemic, from March 22 25, 2020. Originally planned be held Hyatt Boston Harbor, Boston, MA, USA, growing concerns related COVID-19 and impact on community’s abili...