In this paper we outline an approach of applying model-based diagnosis to the field of automatic software debugging of hardware designs. We present our value-level model for debugging VHDL-RTL designs and show how to localize the erroneous component responsible for an observed misbehavior. Furthermore, we discuss an extension of our model that supports the debugging of sequential circuits, not ...

Missing responses occur in many industrial or medical experiments, for example in clinical trials where slow acting treatments are assessed. Finding efficient designs for such experiments is problematic since it is not known at the design stage which observations will be missing. The design literature mainly focuses on assessing robustness of designs for missing data scenarios, rather than find...

Thwarting severe cryptographic hardware attacks requires new approaches to logic and physical designs. This paper presents a systematic design approach to fault tolerant cryptographic hardware designs by combining the concurrent error detection and correction, and uniform switching activity cells. The effectiveness of the Hamming code based error correction schemes as a fault tolerance method i...

In this paper, we describe a hybrid bitand word-level representation called Linear Taylor Expansion Diagram (LTED) [1]. This representation not only has a compact and canonical form, but also is close to hardware-software descriptions so that it can be utilized as a formal model for formal verification and synthesis. The power of abstraction of LTED allows us to represent system level of hardwa...

Robotic arms often perform industrial tasks requiring complex dextrous manipulation within constrained spaces. For example, automobile unibody assembly can require more than 5000 welds, with many performed within the vehicle’s interior. An arm can be designed specifically for this type of task by permuting link lengths and degrees of freedom (DOF) to find a set of feasible designs. Each design ...

ion-Based Performance Analysis of NoCs Daniel E. Holcomb UC Berkeley [email protected] Bryan A. Brady UC Berkeley [email protected] Sanjit A. Seshia UC Berkeley [email protected] ABSTRACT We present an approach to formally analyze quality-of-service (QoS) properties of network-on-chip (NoC) designs. To tackle industrialscale designs, we adopt an abstraction-based approach...

Optimal Feature Design for Vision-Guided Manipulation Azad Shademan, Master of Applied Science in Electrical and Computer Engineering Department, Ryerson University, 2005 Numerous industrial applications use vision-guided manipulation, where cameras are used to generate the feedback control signal. Current vision algorithms select a set of image features to estimate pose in real-time. Object de...

This paper presents a detailed analysis of the yield of embedded static random access memories (eSRAM) which are generated using a compiler. Defect and fault analysis inclusive of industrial data are presented for these chips by taking into accotmt the design constructs (referred to as kernels) and the physical properties of the layout. The new tool CAYA (Compiler-based Array Yield Analysis) is...

T HIS provocative remark has been attributed to the famous industrial statistician, Cuthbert Daniel, by Box et al. (2005) in their well-known text on the design of experiments. Split-Plot experiments were invented by Fisher (1925) and their importance in industrial experimentation has been long recognized (Yates (1936)). It is also well known that many industrial experiments are fielded as spli...