This paper presents single-event effect (SEE) modeling results of circuit-hardened SiGe heterojunction bipolar transistor logic circuits. A simple equivalent circuit is proposed to model the ion-induced currents at all of the terminals, including the p-type substrate. The SEE sensitivity of a D-flip-flop was simulated using the proposed equivalent circuit. The simulation results are qualitative...

Memory elements play a vital role on Digital World. In memory devices the most important factor is power consumption. Because the power consumption of the memory device increases means, the device reliability and life time is reduced. The basic memory elements of designer considerations are Latch and Flip-flop. In this paper we design SRAM using arrays of flip-flops and we analyze the design of...

Flip-flops are critical timing elements in digital circuits which have a large impact on circuit speed and power consumption in VLSI circuits. In this paper, a dualedge triggered flip-flop with high performance and clock gated sense amplifier flip-flop is designed. Moreover, the pulse generator can be shared among many flip-flops to reduce the power dissipation and chip area. By incorporating t...

ABSTRACT: All-optical T (Toggle) flip-flop with preset (PR) and clear (CLR) are basic building modules for the development of ultra-high speed all optical binary counter. In this paper, a non-linear material based alloptical switching mechanism is utilized here to realize the all-optical T flip-flop with PR and CLR. A composite slab of linear medium (LM) and non-linear medium (NLM) is used to d...

The dynamic behavior of surface dimers on Ge(001) has been studied by positioning the tip of a scanning tunneling microscope over single flip-flopping dimers and measuring the tunneling current as a function of time. We observe that not just symmetric, but also asymmetric appearing dimers exhibit flip-flop motion. The dynamics of flip-flopping dimers can be used to sensitively gauge the local p...

As the density and operating speed of CMOS VLSI chips increases, leakage power dissipation becomes more and more significant. This paper presents a leakage power behavior in Pulse triggered flip-flop. All the designs are simulated with and without the application of leakage reduction techniques and the readings are presented. By analyzing the leakage path of flip flops we propose a method to re...

QCA (Quantum Dot Cellular Automata) is an emerging and pioneer technology, which is a paradigm for computing with interacting quantum dots. Many eminent researchers have well thought of eloquent work in the existing areas of the sequential circuit. However, this paper proclaims three new approaches to design JK and T flip-flop. Since flip-flops and memory design are the crucial building blocks ...

Power consumption is a major bottleneck of system performance. A large portion of the on chip power is consumed by the clock system. It is made of the any integrated circuit, clock distribution network and flop-flops. A new system will considerably reduce the number of transistor it will lead to the reduction in clocking power and also improve the overall power consumption. Various design techn...