Gary Spivey Rincon Research Corporation Tucson, AZ, USA [email protected] Shuvra S. Bhattacharyya ECE Department and UMIACS University of Maryland, USA [email protected] Kazuo Nakajima ECE Dept, UMD, USA and New Architecture Open Lab NTT Communication Science Labs, Kyoto, Japan [email protected] Abstract We introduce the Logic Foundry, a system for the rapid creation and integration of F...

-In this paper a 4 bit parallel adder/subtractor circuit has been designed and analyzed. The circuit uses a controlled adder/subtractor circuit which converts the negative numbers into their 2’s complement. A comparative study of the silicon area and the power consumption has been done in the circuit using different channel lengths such as 65nm, 45nm. The circuit is designed and simulated using...

The high cost of IC design has made chip protection one of the first priorities of the semiconductor industry. Although there is a common impression that combinational circuits must be designed without any cycles, circuits with cycles can be combinational as well. Such cyclic circuits can be used to reliably lock ICs. Moreover, since memristor is compatible with CMOS structure, it is possible t...

The Open Biomedical Ontologies (OBO) Foundry is a coordinated community-wide effort to develop ontologies that support the annotation and integration of scientific data. In work supported by the National Database of Autism Research (NDAR), we are developing an ontology of autism that extends the ontologies available in the OBO Foundry. We undertook a systematic literature review to identify dom...

My dissertation work was focused on developing a method for evaluating and standardizing ontologies, based on an integration of the Basic Formal Ontology (BFO) and OntoClean [1]. The primary objective is to help standardize the creation of ontologies for the Open Biomedical Ontologies (OBO) Foundry, for which BFO is the chosen upper ontology, given that there are no formal criteria that candida...

We demonstrate a monolithic photonic integration platform that leverages the existing state-of-the-art CMOS foundry infrastructure. In our approach, proven XeF2 post-processing technology and compliance with electronic foundry process flows eliminate the need for specialized substrates or wafer bonding. This approach enables intimate integration of large numbers of nanophotonic devices alongsid...

This paper describes a doubly balanced Gilbert Cell mixer designed in BJT and CMOS technology to operate within 0 to 5 V. A 100 mv input signal was applied at both RF and LO port at different frequencies and their simulation curves were studied for a multiplier. The design done in BJT was taped out for fabrication and the chip on its return from foundry, was tested for its results. A comparison...

K. Kaczmarska, B. Grabowska, D. Drożyński, AGH University of Science and Technology, Faculty of Foundry Engineering, Krakow, Poland The results of preliminary tests of selected properties of the moulding sands with the binder in the form of a 5 % water solution of the sodium salt of carboxymethyl starch (with a degree of substitution (DS) of 0,2 and 0,87) are presented in this study. The mouldi...

To supplement epidemiological investigations into the mortality from respiratory cancer in the small industrial town of Armadale, central Scotland, spherical moss bags were used to study the deposition of atmospheric metal pollution there during a period of 17 months. High concentrations of most metals were found in areas close to the local steel foundry. High concentrations of some metals were...

Microshrinkages are known as probably the most difficult defects to avoid in high-precision foundry. The presence of this failure renders the casting invalid, with the subsequent cost increment. Modelling the foundry process as an expert knowledge cloud allows properly-trained machine learning algorithms to foresee the value of a certain variable, in this case the probability that a microshrink...