This paper proposes a parallel fixed point radial basis function (RBF) artificial neural network (ANN), implemented in a field programmable gate array (FPGA) trained online with a least mean square (LMS) algorithm. The processing time and occupied area were analyzed for various fixed point formats. The problems of precision of the ANN response for nonlinear classification using the XOR gate and...

The field programmable gate array (FPGA) technology provides programmable system-on-chip (PSoC) environments for designing modern digital ASIC controllers for specific applications. This paper presents a FPGA based speed control IC for three-phase induction motor drives. The sinusoidal PWM is realized on a single FPGA chip from Xilinx Inc. to provide controlling switching pulses for inverter bl...

This contribution provides an approach for emulating the behaviour of an ASIC temperature monitoring system (TMon) during run-time for a tightly-coupled processor array (TCPA) of a heterogeneous invasive multi-tile architecture to be used for FPGA prototyping. It is based on a thermal RC modeling approach. Also different usage scenarios of TCPA are analyzed and compared.

This paper deals with the implementation of PID controller for a DC motor controller application on FPGA platform. The soft IP core of PID controller is implemented on FPGA ALTERA Quartus II platform by using Quartus II software version 10.1. The PWM signal is generated by ALTERA board, which further given to DC motor for its speed control. The soft IP core of PID controller is prototyped and v...

This paper presents a parallel array of processors implemented in a Field Programmable Gate Array (FPGA) for the solution of linear equations systems. The solution is performed using the division-free Gaussian elimination method. This algorithm was implemented in integrated processors in a FPGA Spartan 3 of Xilinx. A top-down design was used. The proposed architecture can handle IEEE 754 single...

Modular systems implemented on field-programmable gate arrays (FPGAs) can benefit from being able to load and unload modules at run-time, a concept that is of much interest in the research community. Although dynamic partial reconfiguration is possible in Virtex and Spartan series FPGAs, the configuration architecture of these devices is not amenable to modular reconfiguration, a limitation whi...

An emerging class of Field-Programmable Gate Arrays (FPGAs) permits partial reconnguration of the device without disturbing the rest of the array { even while the device is operating. Dynamic device reconnguration allows novel approaches to the migration of algorithms from software to hardware. New simulation tools are required in order to fully exploit the FPGA's versatility. We demonstrate ho...

⎯ This article presents a design of the logistic map by means of FPGA (Field Programmable Gate Array) under fixed-point standard and 32-bits of precision. The design was carried out with Altera Quartus platform. The hardware description language VHDL-93 has been adopted and the results were simulated by means of Altera ModelSim package. The main of the project was to produce a chaotic system wi...