Software applications for mobile platforms require a delicate balance between throughput and resource consumption. Programming them is a complex multi-level job: Tasks must be assigned to heterogeneous processors, and must be scheduled on time, to meet throughput constraints. The processors must be controlled for minimal power consumption, using techniques like DPM (Dynamic Power Management) an...

Given energy as the limiting factor in a low-power battery-driven embedded microcontroller (MCU), energy-efficient operation is critical. Low-energy microcontrollers benefit from comparable performance and longer lifetimes when compared to microcontroller cores without energy saving schemes. Dynamic voltage and frequency scaling (DVFS) has been proposed in [1] as a novel technique to provide op...

In this study, we analyze interference trends when corunning multiple applications possessing varying degrees of memory intensity on multi-core processors. We conduct tests with PARSEC benchmark applications and explore energy consumption, execution times, and main memory accesses when interfering applications share last-level cache. We also explore how co-running applications are impacted when...

Many-core chips are especially attractive for data center operators providing cloud computing service models. With the advance of many-core chips in such environments energy-conscious scheduling of independent processes or operating systems (OSes) is gaining importance. An important research question is how the scheduler of such a system should assign the cores to the OSes in order to achieve a...

Graphics Processing Units(GPU) are widely used as deep learning accelerators because of its high performance and low power consumption. Additionally, it remains secure against hardware-induced transient fault injection attacks, a classic type attacks that have been developed on other computing platforms. In this work, we demonstrate well-trained machine models robust hardware when the faults ge...

The thermal covert channels (TCCs) in many-core systems can cause detrimental data breaches. In this article, we present a three-step scheme to detect and fight against such TCC attacks. Specifically, the detection step, each core calculates spectrum of its own CPU workload traces that are collected over few fixed time intervals, then it applies frequency scanning method if there exists any att...

Power is arguably the critical resource in computer system design today. In this work, we focus on maximizing performance of a chip multiprocessor (CMP) system, for a given power budget, by developing techniques to budget power between processor cores and caches. Dynamic cache configuration can reduce cache capacity and associativity, thereby freeing up chip power, but may increase the miss rat...

Datacenters have become an important part of today’s computing infrastructure. Recent studies have shown the increasing importance of thermal considerations to achieve effective resource management. In this paper, we study thermal-aware scheduling for homogeneous high-performance computing (HPC) datacenters under a thermal model that captures both spatial and temporal correlations of the temper...

Many real time applications demonstrate uncertain workload that varies during runtime. One of the major influences of the workload fluctuation is the selection of conditional branches which activate or deactivate a set of instructions belonging to a task. In this work, we capture the workload dynamics using Conditional Task Graph (CTG) and propose a set of algorithms for the optimization of tas...

Energy efficiency, real-time response, and data transmission reliability are important objectives during networked systems design. This paper aims to develop an efficient task mapping scheme balance these but conflicting objectives. To achieve this goal, tasks triplicated enhance mapped on the wireless nodes of with Dynamic Voltage Frequency Scaling (DVFS) capabilities reduce energy consumption...