نتایج جستجو برای: dividing circuit arithmetic
تعداد نتایج: 161325 فیلتر نتایج به سال:
Mix-nets can be used to shuffle vectors of shared secrets. This operation can be an important building block for solving combinatorial problems where constraints depend on secrets of different participants. A main contribution of this paper is to show how participants in the mix-net can provide Zero-Knowledge proofs to convince each other that they do not tamper with the shuffled secrets, and t...
A 2009 IEEE Transactions on Computers (TC) guest editorial called computer arithmetic “the mother of all computer research and application topics.” Today, one might question what computer arithmetic still o ers in terms of advancing scienti c research; after all, multiplication and addition haven’t changed. The answer is surprisingly easy: new architectures, processors, problems, application do...
From 08.11.06 to 10.11.06, the Dagstuhl Seminar 06451 Circuits, Logic, and Games was held in the International Conference and Research Center (IBFI), Schloss Dagstuhl. During the seminar, several participants presented their current research, and ongoing work and open problems were discussed. Abstracts of the presentations given during the seminar as well as abstracts of seminar results and ide...
We show that the two main reduction notions in arithmetic circuit complexity, p-projections and c-reductions, differ in power. We do so by showing unconditionally that there are polynomials that are VNP-complete under c-reductions but not under p-projections. We also show that the question of which polynomials are VNP-complete under which type of reductions depends on the underlying field.
The Overlap Resolution Number System (ORNS) employs bit level residue arithmetic, and opens up a powerful approach to digital computing with analog processing elements. This new redundant representation of signals, with Continuous Valued Digits, opens up new methods for binary arithmetic and digital signal processing. The number system is based on analog residues as opposed to binary or multipl...
This report describes experiments in generating low-communication secure multi-party protocols on arithmetic circuits by providing a translation from a Boolean circuit format. Boolean circuits are typically used for Yao’s garbled circuits protocol, providing a constant-round computation with relatively large communication overhead. BGW-style protocols based on ring or field arithmetic have lowe...
This paper presents arithmetic operations like addition, subtraction and multiplications in Modulo-4 arithmetic, and also addition, multiplication in Galois field, using multi-valued logic (MVL). Quaternary to binary and binary to quaternary converters are designed using down literal circuits. Negation in modular arithmetic is designed with only one gate. Logic design of each operation is achie...
Soft computing based approaches are increasingly being used to solve different NP complete problems, the development of efficient parallel algorithms for digital circuit partitioning, circuit testing, logic minimization and simulation etc. is currently a field of increasing research activity. This paper describes evolutionary based approach for solving circuitpartitioning problem. That implies ...
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