نتایج جستجو برای: diagonal power reduction
تعداد نتایج: 967796 فیلتر نتایج به سال:
A universal schema for diagonalization was popularized by N.S. Yanofsky (2003), based on a pioneering work of F.W. Lawvere (1969), in which the existence of a (diagonolized-out and contradictory) object implies the existence of a fixed-point for a certain function. It was shown that many self-referential paradoxes and diagonally proved theorems can fit in that schema. Here, we fi...
Next-to-leading order evolution of twist-two conformal operators: The Abelian case. Abstract We present the method, based on the use of the broken conformal Ward identities, for the calculation of the anomalous dimensions of conformal operators beyond the leading order of perturbation theory. By means of this technique we find the complete set of two-loop corrections to the off-diagonal element...
In this paper we prove that the simplest band representations of unitary operators on a Hilbert space are five-diagonal. Orthogonal polynomials on the unit circle play an essential role in the development of this result, and also provide a parametrization of such five-diagonal representations which shows specially simple and interesting decomposition and factorization properties. As an applicat...
A matrix-valued measure Θ reduces to measures of smaller size if there exists a constant invertible matrix M such that MΘM∗ is block diagonal. Equivalently, the real vector space A of all matrices T such that TΘ(X) = Θ(X)T ∗ for any Borel set X is nontrivial. If the subspace Ah of self-adjoints elements in the commutant algebra A of Θ is nontrivial, then Θ is reducible via a unitary matrix. In ...
This paper presents a class of preconditioners for sparse systems arising from discretized partial differential equations (PDEs). In this class of preconditioners, we exploit the multilevel sequentially semiseparable (MSSS) structure of the system matrix. The off-diagonal blocks of MSSS matrices are of low-rank, which enables fast computations of linear complexity. In order to keep the low-rank...
This paper combines two different styles of asynchronous circuitry used in de-synchronization flow. We offer 20% power savings using approximation functions over previously known architecture while preserving the ability to measure the speed of the circuit at fabrication time or run time. The overhead introduced by additional circuitry is minimal when compared with the baseline dual-rail design.
An iterative approach for joint optimization of a scalar error-feedback matrix and a coordinate transformation matrix is developed to minimize the roundoff noise subject to the l2-norm dynamic-range scaling constraints. When the iterative algorithm converges and the optimal coordinate transformation matrix is obtained, the diagonal error-feedback matrix is derived to minimize the noise gain in ...
Optimal capacitor placement, considering power system loss reduction, voltage profile improvement, line reactive power decrease and power factor correction, is of particular importance in power system planning and control. The distribution system operator calculates the optimal place, number and capacity of capacitors based on two major purposes: active power loss reduction and return on invest...
The advantage of scaling devices is to achieve high performance, low power, large integration and low cost continues to be attractive to the semiconductor industries. However, increasing variability in the device characteristics, soft errors and device degradation in CMOS technologies pose major challenges in the future scaling. Variation in process, voltage and temperature cause uncertainty in...
The realization of fast datapaths in signal processing environments requires fastest logic styles with synchronous behavior. This paper presents a systematic method which efficiently combines improvements on algorithm and logic level. Thus, the design of power efficient, fast and synchronous pipelines is possible. To reduce the power consumption of dynamic logic, we show methods for single-rail...
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